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SLWS245B – MAY 2014 – REVISED FEBRUARY 2017
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Copyright © 2014–2017, Texas Instruments Incorporated
Typical Application (continued)
9.2.1 Design Requirements
lists the pin termination requirements and interfacing for the circuit.
Table 17. Termination Requirements and Interfacing
PIN
NAME
DESCRIPTION
47
DATA
4WI data input: digital input, high impedance
2
RDBK
Readback output; digital output pins can source or sink up to 8 mA of current
3
LD
Lock detector digital output, as configured by MUX_CTRL
8,10,27,29
BBI_P, BBI_N, BBQ_P,
BBQ_N
In-phase and quadrature baseband differential baseband signals. Typical 0.25V common mode is
needed
18
RFOUT
Modulator RF output: must be ac-coupled and can drive 50
Ω
load
31
EXT_VCO
External local oscillator input: high impedance, normally ac-coupled. If unused terminate to 50 ohms load
38,39
LO_OUTP, LO_OUTN
Local oscillator output: open-collector output. A pull-up resistor is LO_OUT required, normally ac-coupled.
44
REFIN
Reference clock input: high impedance, normally ac-coupled
46
LE
Serial interface latch enable: digital input, high impedance
48
CLK
Serial interface clock input: digital input, high impedance
47
DATA
Serial interface data input: digital input, high impedance