51
SLWS245B – MAY 2014 – REVISED FEBRUARY 2017
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Copyright © 2014–2017, Texas Instruments Incorporated
Table 14. Register 0 (Readback Only)
Register 0
Bit Name
Reset Value
Description
Bit0
ADDR<0>
0
Register Address Bits
Bit1
ADDR<1>
0
Bit2
ADDR<2>
0
Bit3
ADDR<3>
1
Bit4
ADDR<4>
0
Bit5
CHIP_ID<0>
1
Chip ID
Bit6
CHIP_ID<1>
0
Bit7
NU
x
Not Used
Bit8
NU
x
Bit9
NU
x
Bit10
NU
x
Bit11
NU
x
Bit12
R_SAT_ERR
x
R-div saturation error for cal
Bit13
COUNT<0>/NU
x
VCO frequency counter high when
MUX_COUNT = 0 and VCO_TEST_MODE = 1
VCO frequency counter low when
MUX_COUNT = 1 and VCO_TEST_MODE = 1
Autocal results for VCO_TRIM and VCO_SEL when
VCO_TEST_MODE = 0
Bit14
COUNT<1>/NU
x
Bit15
COUNT<2>/VCO_TRIM<0>
x
Bit16
COUNT<3>/VCO_TRIM<1>
x
Bit17
COUNT<4>/VCO_TRIM<2>
x
Bit18
COUNT<5>/VCO_TRIM<3>
x
Bit19
COUNT<6>/VCO_TRIM<4>
x
Bit20
COUNT<7>/VCO_TRIM<5>
x
Bit21
COUNT<8>/VCO_SEL<0>
x
Bit22
COUNT<9>/VCO_SEL<1>
x
Bit23
COUNT<10>/VCO_SEL<2>
x
Bit24
COUNT<11>
x
Bit25
COUNT<12>
x
Bit26
COUNT<13>
x
Bit27
COUNT<14>
x
Bit28
COUNT<15>
x
Bit29
COUNT<16>
x
Bit30
COUNT<17>
x
Bit31
MUX_COUNT
x
[0] = max freq count, [1] = min freq count