Texas Instruments TRF3722 EVM, Manual

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TRF3722
www.ti.com SLWS245B – MAY 2014 – REVISED FEBRUARY 2017
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8.5.1 Serial interface Register Definition
Table 5. Register 1
Register 1 Bit Name Reset Value Description
Bit0 ADDR<0> 1
Register Address Bits
Bit1 ADDR<1> 0
Bit2 ADDR<2> 0
Bit3 ADDR<3> 1
Bit4 ADDR<4> 0
Bit5 RDIV<0> 1
13-bit Reference Divider Value
(Rmin = 1, Rmax = 8191)
Bit6 RDIV<1> 0
Bit7 RDIV<2> 0
Bit8 RDIV<3> 0
Bit9 RDIV<4> 0
Bit10 RDIV<5> 0
Bit11 RDIV<6> 0
Bit12 RDIV<7> 0
Bit13 RDIV<8> 0
Bit14 RDIV<9> 0
Bit15 RDIV<10> 0
Bit16 RDIV<11> 0
Bit17 RDIV<12> 0
Bit18 RSV 0 Reserved
Bit19 REF_INV 0 Invert Reference Clock Polarity; 1 = use falling edge
Bit20 NEG_VCO 1 VCO polarity control; 1 = negative slope (negative Kv)
Bit21 ICP<0> 0
Program charge pump DC current:
[00000] = 1.94 mA
[11111] = 0.47 mA
[01010] = 0.97 mA Bit22 ICP<1> 1
Bit23 ICP<2> 0
Bit24 ICP<3> 1
Bit25 ICP<4> 0
Bit26 ICPDOUBLE 0 1 = Set ICP to double the current
Bit27 CAL_CLK_SEL<0> 0
Multiplication or division factor to create VCO calibration clock from
the PFD frequency:
[0000] = Fastest ( Rdiv / 128)
[1111] = Slowest (Rdiv x 128), [1000] = Default (1x Rdiv)
Bit28 CAL_CLK_SEL<1> 0
Bit29 CAL_CLK_SEL<2> 0
Bit30 CAL_CLK_SEL<3> 1
Bit31 RSV 0 Reserved