Table 1-1. Connector Descriptions (continued)
Connector
Function
Description
J11
VIN connection to 5V
regulator
J11 is loaded by default which allows for VIN to power the 5-V regulator. Removing J11 allow
for the connection of the 5V regulator by external supply to VBIAS test point to do
performance testing such as measuring input current of the regulator.
J7
UDIM1 jumper
J7 and J8 are jumpers to allow for PWM signals to be applied to the two channels by the
UDIM1 and UDIM2. When the jumpers are removed (default configuration) the PWM outputs
can be generated from register setting of the TPS92520 or by applying a signal directly to
the UDIM pins. If pins 1 and 2 are shunted on J7 and J8 then a non-inverted PWM signals
from the LEDMCUEVM-132 controller board is connected to the UDIM pins and controls the
PWM dimming via the GUI. When the jumpers are populated from pin 2 to 3 then the PWM
signals from LEDMCUEVM-132 are inverted. The PWM signals can be used to disable the
associated channels.
J8
UDIM2 jumper
J4
SSN configuration jumper
J9 allows configuration of the SSN chip select line, when multiple chips on the same SPI bus
are used. By default, evaluation module shunt connect pin 7 and 8 of J4, which is SSN0 of
the LEDMCUEVM-132. Moving the shunt location changes the SSN that is used.
Table 1-2. Test Points
Test Point
Description
GND (TP15,
TP16, TP17,
TP18, TP19)
Larger metal turrets and test points allow for multiple connection to grounds across the board.
VIN (TP4)
The VIN test point allows for voltage and current measurement of the external power supply applied to the evaluation
board for the 5V regulator assuming J1 is configured properly.
VIN1 (TP3)
The VIN1 test point allows for voltage and current measurement of the power applied to the VIN1 pin of the TPS92520-
Q1 assuming J1 is configured properly.
VIN2 (TP5)
The VIN2 test point allows for voltage and current measurement of the power applied to the VIN2 pin of the TPS92520-
Q1 assuming J1 is configured properly.
LHI (TP8)
The LHI test point is the LED current reference set point for both Limp-home and standalone mode for the TPS92520-
Q1. Setting voltages below 148 mV disables both channels and setting the voltage above 200mV enables both
channels in Limp-home and standalone mode.
nFLT (TP7)
The nFLT test point can be used to monitor if a fault has occurrence in the TPS92520-Q1. When a fault occurs, nFLT
voltage level goes low. Read Faults and Diagnostics section of the
to determine which faults
trigger the nFLT indication and how to clear the fault.
VLED1 (TP6)
The VLED1 test point allows for connection of the LED loads to channel-1 output. Large turrets allow for multiple
connections for voltage measurements.
VLED2 (TP12)
The VLED2 test point allows for connection of the LED loads to channel-2 output. Large turrets allow for multiple
connections for voltage measurements.
SW1 (TP9)
The SW1 test point allows for observing the switch node for channel 1 during operation with an oscilloscope.
SW2 (TP13)
The SW2 test point allows for observing the switch node for channel 2 during operation with an oscilloscope.
VBIAS (TP1)
VBIAS test point connects directly to the input of the linear regulator that generates the 5V supply used by the
TPS92520-Q1. The test point can be used to monitor the input voltage or used to connect to an external supply for both
voltage and current measurements assuming J11 is unloaded.
5VD (TP10)
5VD test point connects directly to the V5D digital pin of the TPS92520-Q1. This can be used to monitor the voltage or
used to supply the power directly to the V5D pin assuming J11 is disconnected and nothing is powering the 5V bus.
Note if doing current measurements then R10 connects 5VD rail to V5A which consumes power but can be separated
by removing R10 and supply V5A externally.
V5A (TP11)
V5A test point connects directly to V5A pin of the TPS92520-Q1. This can be used to monitor the voltage or current
used to supply the power directly to V5A pin assuming R10 has been removed. By default V5D and V5A are shorted
together and the supply is provided by the 5VD supply.
UDIM1 (TP2)
UDIM1 test point allows for the direct connection of the UDIM1 pin of the TPS92520-Q1. UDIM1 test point allows for
external PWM dimming signals to control channel 1 assuming J7 is unloaded. This test point can also be used to
monitor the PWM signal generated from the LEDMCUEVM-132 for channel 1 assuming J7 is loaded.
Description
SLUUCC4 – OCTOBER 2020
TPS92520EVM-133 Dual 1.6-A Synchronous Buck LED Driver Evaluation
Module
7
Copyright © 2020 Texas Instruments Incorporated
