3 Schematic
(
)
2
CLK
PGOOD
DATA
EN
SCL
SDA
FB
VDD
GND
SW
ADDR
VBST
DRVH
DRVL
TRIP
VREG
ALERT#
VO
PwPd
ALERT#
OPEN= ENABLE
VIN
PGND
Input:
VOUT
PGND
Output:
1.2V @ 0 - 25A
8 - 14V
SW
DRVH
DRVL
PGOOD
VREG
LOOPB
GND
VDD
1
1
1
1
1
Not Populated
LOOPA
1
1
1
R4
1.00K
R3
300k
R17
10.0k
C18
1uF
R5
0
1
2
J2
C8
1000pF
1
2
3
4
5
6
7
8
9
10
J4
R14
100k
R18
10.0k
C19
1uF
R1
100k
R9
3
C1
22uF
C4
22uF
C3
22uF
+
C6
1
2
3
4
J3
1
2
3
4
J1
C7
0.1uF
R2
100k
R6
4.7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
U1
Lm
LM27403
R10
39.2k
C10
100uF
L1
0.440uH
C2
22uF
C5
0.1uF
Q1
CSD87350Q5D
TP1
TP4
TP5
R8
0
TP8
TP7
TP9
TP3
TP6
TP2
R16
0
TP11
TP12
R15
100k
R12
0
TP10
+
C15
+
C16
C11
100uF
C12
100uF
C13
100uF
C14
100uF
R7
C17
C9
R11
0
R13
TP13
VIN
VREG
VOUT
VIN
VREG
VREG
VOUT
FB
FB
Figure 3-1. TPS53819AEVM-123 Schematic
Schematic
4
TPS53819A Buck Controller Evaluation Module User's Guide
SLVU719B – MAY 2012 – REVISED NOVEMBER 2021
Copyright © 2021 Texas Instruments Incorporated