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Texas Instruments TPS36Q1EVM, User Manual

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Texas Instruments TPS36Q1EVM User Manual Download Page 6

3.1 TPS36Q1EVM Schematic

VDD

8

MR

1

RESET

7

CRST

3

CWD

2

SET0

5

WDI

6

GND

4

TPS3436CCCBGDDFRQ1

U1

GND

GND

SET0,SET1

WDO,RESET

GND

GND

GND

GND

GND

GND

GND

MR,SET0,CWD

CRST,WDI

CWD,MR,CRST,WD_EN

WDO,WDI,WD_EN

25V
0.01µF

C6

1µF
25V

C7

1µF
25V

C5

25V
0.01µF

C4

1µF
25V

C3

25V
0.01µF

C2

1

2
3

J4

PEC03SAAN

100k

R1

100k

R2

100nF
16V

C1

1

2

3

4

5

6

7

8

J2
15912080

1

2

3

4

5

6

7

8

J3

15912080

1

2

3

4

5

6

7

8

J1

15912080

1

2

3

4

5

6

7

8

J5

15912080

TP1

5016

TP8

5016

TP9

5016

TP3

5016

TP2

5016

TP5

5016

TP6

5016

TP7

5016

GND

VDD

V

D

D

1

2

J6

878980204

VDD

VDD

VDD

PIN2

PIN2

PIN3

PIN3

PIN1

PIN1

VDD

PIN5

PIN5

PIN6

PIN6

TP4

5016

PIN4

PIN4

TP11

5016

TP10

5016

Figure 3-1. TPS36Q1EVM Schematic

Schematic, Bill of Materials, and Layout

www.ti.com

6

TPS36Q1EVM Voltage Supervisor User Guide

SLVUCG9 – OCTOBER 2022

Submit Document Feedback

Copyright © 2022 Texas Instruments Incorporated

Summary of Contents for TPS36Q1EVM

Page 1: ...5 7 Watchdog Output WDO 14 5 8 CRST 14 5 9 CWD 15 6 EVM Performance Results 16 7 Revision History 17 List of Figures Figure 2 1 TPS36Q1EVM Board Top 3 Figure 2 2 TPS36Q1EVM Board Bottom 3 Figure 3 1 TPS36Q1EVM Schematic 6 Figure 3 2 Component Placement Top Assembly 8 Figure 3 3 Component Placement Bottom Assembly 8 Figure 3 4 Layout Top 8 Figure 3 5 Layout Bottom 8 Figure 3 6 Top Layer 8 Figure 3 ...

Page 2: ...ly 12 Table 5 1 Typical tWC Values for TPS36 Q1 and TPS3436 Q1 15 1 Trademarks All trademarks are the property of their respective owners Trademarks www ti com 2 TPS36Q1EVM Voltage Supervisor User Guide SLVUCG9 OCTOBER 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 3: ...PS3436 Q1 TPS35 Q1 and TPS36 Q1 families offer multiple pinout options The TPS36Q1EVM offers connections to all input and output pins supported by various pinouts Test points are provided to give the user access to an extra ground connection if needed for oscilloscope or multimeter measurements Table 2 1 Voltage Supervisors VOLTAGE SUPERVISION WATCHDOG TPS3435 Q1 None Timeout TPS3436 Q1 None Windo...

Page 4: ... Precision Watchdog Timer data sheet TPS35 Q1 Automotive Nano IQ Precision Watchdog Timer data sheet TPS36 Q1 Automotive Nano IQ Precision Watchdog Timer data sheet Introduction www ti com 4 TPS36Q1EVM Voltage Supervisor User Guide SLVUCG9 OCTOBER 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 5: ...detailed description of the TPS36Q1EVM schematic bill of materials BOM and layout www ti com Schematic Bill of Materials and Layout SLVUCG9 OCTOBER 2022 Submit Document Feedback TPS36Q1EVM Voltage Supervisor User Guide 5 Copyright 2022 Texas Instruments Incorporated ...

Page 6: ... 2 3 4 5 6 7 8 J2 15912080 1 2 3 4 5 6 7 8 J3 15912080 1 2 3 4 5 6 7 8 J1 15912080 1 2 3 4 5 6 7 8 J5 15912080 TP1 5016 TP8 5016 TP9 5016 TP3 5016 TP2 5016 TP5 5016 TP6 5016 TP7 5016 GND VDD VDD 1 2 J6 878980204 VDD VDD VDD PIN2 PIN2 PIN3 PIN3 PIN1 PIN1 VDD PIN5 PIN5 PIN6 PIN6 TP4 5016 PIN4 PIN4 TP11 5016 TP10 5016 Figure 3 1 TPS36Q1EVM Schematic Schematic Bill of Materials and Layout www ti com 6...

Page 7: ...Molex J4 1 Header 100mil 3x1 Tin TH CONN_PEC03SAAN PEC03SAAN Sullins Connector Solutions J6 1 Header 2 54 mm 2x1 Gold R A SMT Molex_87898 0204 878980204 Molex LBL1 1 Thermal Transfer Printable Labels 0 650 W x 0 200 H 10 000 per roll Label_650x200 THT 14 423 10 Brady R1 R2 2 100k RES 100 k 1 0 1 W 0603 0603 RC0603FR 07100KL Yageo TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 11 Test Point Compact ...

Page 8: ...3 7 show the top and bottom layers and Figure 3 8 shows the top solder mask of the EVM Figure 3 2 Component Placement Top Assembly Figure 3 3 Component Placement Bottom Assembly Figure 3 4 Layout Top Figure 3 5 Layout Bottom Figure 3 6 Top Layer Figure 3 7 Bottom Layer Schematic Bill of Materials and Layout www ti com 8 TPS36Q1EVM Voltage Supervisor User Guide SLVUCG9 OCTOBER 2022 Submit Document ...

Page 9: ...e 3 8 Top Solder Mask www ti com Schematic Bill of Materials and Layout SLVUCG9 OCTOBER 2022 Submit Document Feedback TPS36Q1EVM Voltage Supervisor User Guide 9 Copyright 2022 Texas Instruments Incorporated ...

Page 10: ...e details on watchdog timeout periods Do not connect to pins 5 6 in this configuration Pin 3 CRST J3 Closed pin 1 pin 2 Jumper J3 configures the CRST pin Connect a shunt jumper to pins 7 8 to connect to VDD pins 3 4 to connect to C6 and pins 1 2 to connect to C7 Refer to 5 7 CRST and the data sheet for more details on watchdog timeout periods Do not connect to pins 5 6 in this configuration Pin 5 ...

Page 11: ...hunt jumper to pins 1 2 to activate pull up resistor R2 and pull the RESET output high Disconnect pins 1 2 if using a push pull variant Table 4 3 Pinout C Onboard Jumpers PIN NUMBER NAME JUMPER CONNECTION DEFAULT CONNECTION DESCRIPTION Pin 1 SET0 J1 Closed pin 5 pin 6 Jumper J1 configures the SET0 pin Connect a shunt jumper to pins 5 6 of jumper J1 to input a logic high or to pins 7 8 to input a l...

Page 12: ... using an open drain variant to activate pull up resistor R1 and pull the WDO output high Connect pins 3 4 if using a push pull variant Pin 7 RESET J6 Closed pin 1 pin 2 Jumper J6 is used if there is an open drain variant being evaluated Connect a shunt jumper to pins 1 2 to activate pull up resistor R2 and pull the RESET output high Disconnect pins 1 2 if using a push pull variant 4 2 EVM Test Po...

Page 13: ...Figure 4 1 Schematic Closeup www ti com EVM Connectors SLVUCG9 OCTOBER 2022 Submit Document Feedback TPS36Q1EVM Voltage Supervisor User Guide 13 Copyright 2022 Texas Instruments Incorporated ...

Page 14: ...al Pulling the MR pin HIGH will return the RESET and WDO outputs to their deasserted states after the tD time delay 5 4 SET0 and SET1 The function of the SETx pins will vary based on the device used in the EVM Please refer to the device data sheet for the functionality Drive SETx pins to logic 1 connect to VDD or logic 0 connect to GND as per the device pinout and functionality requirements Refer ...

Page 15: ... tWD values are determined by the SET0 and SET1 pins please refer to Table 5 1 for a list of the values and the data sheet for the tWD calculation Refer to Table 4 1 and Table 4 2 for suggested jumper settings If other timing option is needed the capacitor can be replaced Refer to the respective device data sheet to determine the capacitor value for required timing Table 5 1 Typical tWC Values for...

Page 16: ...sing the TPS3436CCCBGDDFRQ1 with SET0 0 and SET1 0 Figure 6 1 Early Fault Figure 6 2 Late Fault EVM Performance Results www ti com 16 TPS36Q1EVM Voltage Supervisor User Guide SLVUCG9 OCTOBER 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 17: ...e 6 3 Valid Pulse Figure 6 4 Startup Delay www ti com Revision History SLVUCG9 OCTOBER 2022 Submit Document Feedback TPS36Q1EVM Voltage Supervisor User Guide 17 Copyright 2022 Texas Instruments Incorporated ...

Page 18: ...ay differ from page numbers in the current version DATE REVISION NOTES October 2022 Initial Release Revision History www ti com 18 TPS36Q1EVM Voltage Supervisor User Guide SLVUCG9 OCTOBER 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 19: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Page 20: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Page 21: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Page 22: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Page 23: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Page 24: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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