Texas Instruments TPS23882B1EVM User Manual Download Page 20

Kelvin to U1-4

Kelvin to U1-11

Kelvin to U1-39

Kelvin to U1-32

GND

GND

GND

GND

2 Pair Ports 1-4

PSE Communication Connector

TP5

TP4

TP6

TP7

TP3

TP2

100nF

C8

100nF

C10

100nF

C9

100nF

C7

100nF

C6

100nF

C5

100nF

C3

100nF

C4

58V

D1

0.2

R1

GND

PSE_OSS

\PSE_INT

PSE_SDAO

PSE_SDAI

PSE_SCL

\PSE_RST

3.3V

TP8

5016

GND

GND

VPWR

PSE_N1
PSE_N2

PSE_N3
PSE_N4

5
4

1

2

3

6

7

8

9

10

J1

5
4

1

2

3

6

7

8

9

10

J2

GND

VPWR

PSE_N5
PSE_N6

PSE_N7
PSE_N8

TP1

5011

VPWR

VPWR

VPWR

PSE_D1

CH1_GATE

CH1_SEN

PSE_D2

CH2_GATE

CH2_SEN

PSE_D5

CH5_GATE

CH5_SEN

PSE_D6

CH6_GATE

CH6_SEN

PSE_D3

CH3_GATE

CH3_SEN

PSE_D4

CH4_GATE

CH4_SEN

PSE_D7

CH7_GATE

CH7_SEN

PSE_D8

CH8_GATE

CH8_SEN

PSE_N8

PSE_N7

PSE_N4

PSE_N3

PSE_N1

PSE_N2

PSE_N5

PSE_N6

0.51

R2

DNP

0.2

R3

0.51

R4

DNP

0.51

R9

DNP

0.2

R10

0.51

R11

DNP

0.2

R12

0.2

R5

0.51

R6

DNP

0.2

R7

0.51

R8

DNP

0.51

R13

DNP

0.2

R14

0.51

R15

DNP

0.2

R16

58V

D2

58V

D5

58V

D6

58V

D8

58V

D7

58V

D4

VPWR

58V

D3

4 Pair Ports 1-2

4

7

,8

1

,2

,3

5

,6

,

Q1

4

7

,8

1

,2

,3

5

,6

,

Q2

4

7

,8

1

,2

,3

5

,6

,

Q3

4

7

,8

1

,2

,3

5

,6

,

Q4

4

7

,8

1

,2

,3

5

,6

,

Q7

4

7

,8

1

,2

,3

5

,6

,

Q8

4

7

,8

1

,2

,3

5

,6

,

Q5

4

7

,8

1

,2

,3

5

,6

,

Q6

PSE_D1
PSE_D2

PSE_D3
PSE_D4
PSE_D5
PSE_D6
PSE_D7
PSE_D8

CH1_SEN
CH2_SEN
CH3_SEN
CH4_SEN
CH5_SEN
CH6_SEN
CH7_SEN
CH8_SEN

CH1_GATE
CH2_GATE
CH3_GATE
CH4_GATE
CH5_GATE
CH6_GATE
CH7_GATE
CH8_GATE

\PSE_INT

PSE_SCL

PSE_SDAI

PSE_OSS

PSE_SDAO

\PSE_RST

VPWR

3.3V

GND

GND

0.1uF

C1

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

J5

GND

5
4

1

2

3

6

7

8

9

10

11

12

J3

GPIO_1

GPIO_2

GPIO_3

A1-A4 Connector

1

2

3

4

5

6

7

8

J4

11.0k

R22

DNP

7.68k

R23

DNP

GAT1

1

SEN1

2

DRAIN1

3

KSENSA

4

DRAIN2

5

SEN2

6

GAT2

7

GAT3

8

SEN3

9

DRAIN3

10

KSENSB

11

DRAIN4

12

SEN4

13

GAT4

14

NC

15

NC

16

VPWR

17

NC

18

NC

19

TEST4

20

AGND

21

NC

22

TEST1

23

TEST2

24

TEST3

25

TEST0

26

NC

27

NC

28

GAT5

29

SEN5

30

DRAIN5

31

KSENSC

32

DRAIN6

33

SEN6

34

GAT6

35

GAT7

36

SEN7

37

DRAIN7

38

KSENSD

39

DRAIN8

40

SEN8

41

GAT8

42

VDD

43

RESET

44

INT

45

DGND

46

TEST5

47

A1

48

A2

49

A3

50

A4

51

AUTO

52

SCL

53

SDAI

54

SDAO

55

OSS

56

PAD

57

TPS23882B1RTQR

U1

124k

R17

61.9k

R18

35.7k

R19

DNP

22.6k

R20

DNP

15.8k

R21

DNP

1uF

C11

0.01uF

C12

GND

100nF

C2

Figure 5-3. TPS23882B1EVM-008 (Daughterboard) Schematic

EVM Schematic, Layout Guidelines, PCB Assembly and Layer Plots

www.ti.com

20

TPS23882B1EVM: PoE, PSE, TPS23882B1 Evaluation Module

SLVUC36 – APRIL 2021

Submit Document Feedback

Copyright © 2021 Texas Instruments Incorporated

Summary of Contents for TPS23882B1EVM

Page 1: ...with I2C Monitoring 5 2 6 Advanced Test Setup Using MSP EX430FR5969 LaunchPad 6 3 General Use Features 7 3 1 EVM Input Output Connectors and Switches 7 3 2 EVM LEDs 7 3 3 EVM Test Points 8 3 4 EVM Tes...

Page 2: ...1000BASE T gigabit Ethernet data pass through Single DC power supply input Onboard 3 3 V regulator Onboard I2C interface to the TPS23882B1 device from either USB2ANY or MSP EXP430FR5969 Port ON statu...

Page 3: ...ides galvanic isolation between the PoE power side and host side using digital isolators ISO7241CD The host side power is provided either from J2 of the mother board from USB2ANY or J5 of the motherbo...

Page 4: ...wer level and power on the board without the USB2ANY or MSP EXP430FR5969 connected Figure 2 1 illustrates the basic setup using autonomous mode TPS2373 4EVM 758 Class 3 4 Power Supply J7 J1 32 J33 TPS...

Page 5: ...SB2ANY TPS2373 4EVM 758 Class 3 4 Positive Power Supply J7 J1 32 J33 TPS23882EVM 008 J8 J20 J19 D1 J2 USB2ANY BOOST PSEMTHR 097 Ribbon Cable xxx xxx xx xx xx xxx xxx xxx xx xx xxx xxx PC USB CABLE Eth...

Page 6: ...EXP430FR5969 J21 J9 Ethernet Cable Positive Negative Figure 2 3 Advanced Setup Using LaunchPad CAUTION If wanting to run TPS23882B1 in semi auto mode remove the jumper installed on J5 of the TPS23882B...

Page 7: ...r port 5 data only J32 2 Pair Port 5 Two pair port 5 power and data J30 J30 Two pair port 6 data only J33 2 Pair Port 6 Two pair port 6 power and data J24 J24 Two pair port 7 data only J21 2 Pair Port...

Page 8: ...GND VPWR ground TP4 WHT SDA I2C Data from LaunchPad and USB TO GPIO TP5 WHT SCL I2C Clock from LaunchPad and USB TO GPIO TP6 WHT PSE_SDAO I2C data out from TPS23882B1 TP7 WHT PSE_SCL I2C clock to TPS2...

Page 9: ...1 2 P4 Two pair port 4 LED bias J26 1 2 P5 Two pair port 5 LED bias J25 1 2 P6 Two pair port 6 LED bias J14 1 2 P7 Two pair port 7 LED bias J13 1 2 P8 Two pair port 8 LED bias Daughterboard TPS23882B1...

Page 10: ...e default device address in the GUI is set to 0x20 which matches the default configuration of the EVM J4 on the daughter card is installed with jumpers The GUI sets the TPS23882B1 in configuration B m...

Page 11: ...neering View On the page displayed in Figure 4 4 each port can be configured separately by clicking each RJ45 connector By default the TPS23882B1 is configured in OFF Mode Each port can be configured...

Page 12: ...45 connector If the port is configured in Auto Mode the port will turn on automatically by the PSE device after connecting a valid PD If not configured in Auto Mode a port enable command is required T...

Page 13: ...Figure 4 5 Register Map www ti com TPS23882B1 GUI Setup SLVUC36 APRIL 2021 Submit Document Feedback TPS23882B1EVM PoE PSE TPS23882B1 Evaluation Module 13 Copyright 2021 Texas Instruments Incorporated...

Page 14: ...e Composer Studio 7 2 0 2 OK the workspace location and CCS starts 3 Import the project Project Import CCS Projects make sure you are in CCS Edit mode 4 Navigate to the project location then click the...

Page 15: ...Semi Auto UART Transmission Status www ti com TPS23882B1 GUI Setup SLVUC36 APRIL 2021 Submit Document Feedback TPS23882B1EVM PoE PSE TPS23882B1 Evaluation Module 15 Copyright 2021 Texas Instruments In...

Page 16: ...ted in the MSP430 reference code and Figure 4 8 shows the flow chart Basically after configuration the TPS23882B1 handles port detection classification turn on and faults by itself and there is no con...

Page 17: ...ction Event Get Disconnect Status Determine port s Classification Event Get Classification Status Determine port s Power On Port PPM Classification Valid Print Status Fault Event Get Fault Status Dete...

Page 18: ...oard schematics Figure 5 1 BOOST PSEMTHR8 097 Motherboard Schematic Control EVM Schematic Layout Guidelines PCB Assembly and Layer Plots www ti com 18 TPS23882B1EVM PoE PSE TPS23882B1 Evaluation Modul...

Page 19: ...d Schematic Power Ports www ti com EVM Schematic Layout Guidelines PCB Assembly and Layer Plots SLVUC36 APRIL 2021 Submit Document Feedback TPS23882B1EVM PoE PSE TPS23882B1 Evaluation Module 19 Copyri...

Page 20: ...3 5 6 Q6 PSE_D1 PSE_D2 PSE_D3 PSE_D4 PSE_D5 PSE_D6 PSE_D7 PSE_D8 CH1_SEN CH2_SEN CH3_SEN CH4_SEN CH5_SEN CH6_SEN CH7_SEN CH8_SEN CH1_GATE CH2_GATE CH3_GATE CH4_GATE CH5_GATE CH6_GATE CH7_GATE CH8_GATE...

Page 21: ...imize the impact of PCB trace resistance Refer to Figure 5 10 as an example 5 2 3 Ground Plane Spacing and Isolation GND GND1 and EARTH nets Appropriate spacing should be provided between the GND GND1...

Page 22: ...5 6 BOOST PSEMTHR8 097 Motherboard Layer 2 Routing EVM Schematic Layout Guidelines PCB Assembly and Layer Plots www ti com 22 TPS23882B1EVM PoE PSE TPS23882B1 Evaluation Module SLVUC36 APRIL 2021 Subm...

Page 23: ...BOOST PSEMTHR8 097 Motherboard Bottom Side Routing www ti com EVM Schematic Layout Guidelines PCB Assembly and Layer Plots SLVUC36 APRIL 2021 Submit Document Feedback TPS23882B1EVM PoE PSE TPS23882B1...

Page 24: ...ard Top Side Routing Figure 5 11 TPS23882B1EVM 008 Daughterboard Bottom Side Routing EVM Schematic Layout Guidelines PCB Assembly and Layer Plots www ti com 24 TPS23882B1EVM PoE PSE TPS23882B1 Evaluat...

Page 25: ...ard Bottom Side Assembly www ti com EVM Schematic Layout Guidelines PCB Assembly and Layer Plots SLVUC36 APRIL 2021 Submit Document Feedback TPS23882B1EVM PoE PSE TPS23882B1 Evaluation Module 25 Copyr...

Page 26: ...CAP CERM 1000 pF 50 V 10 X7R 0402 0402 885012205061 Wurth Elektronik D1 1 White LED True Green SMD 2 8x3 2mm LT E6SG AABB 35 1 OSRAM D2 1 58V Diode TVS Uni 58 V 93 6 Vc SMC SMC SMCJ58A 13 F Diodes In...

Page 27: ...W AEC Q200 Grade 0 0603 0603 CRCW060347K0JNEA Vishay Dale R6 1 6 04k RES 6 04 k 1 0 1 W AEC Q200 Grade 0 0603 0603 CRCW06036K04FKEA Vishay Dale R10 R13 2 4 7k RES 4 7 k 5 0 1 W AEC Q200 Grade 0 0603 0...

Page 28: ...B SOIC 16 DW0016B ISO7241CDW Texas Instruments U3 1 Single Buffer Driver With Open Drain Output DCK0005A LARGE T R DCK0005A SN74LVC1G07DCKR Texas Instruments C2 C5 C20 0 1 F CAP CERM 1 F 10 V 10 X7R 0...

Page 29: ...y 8 100V MOSFET N CH 100 V 5 A DNH0008A VSONP 8 DNH0008A CSD19538Q3A Texas Instruments None 8 0 2 RES 0 2 1 0 333 W 0805 0805 RL1220S R20 F Susumu Co Ltd 1 124k RES 124 k 1 0 125 W AEC Q200 Grade 0 08...

Page 30: ...J 6ENF2262V Panasonic 0 15 8k RES 15 8 k 1 0 125 W AEC Q200 Grade 0 0805 0805 ERJ 6ENF1582V Panasonic 0 11 0k RES 11 0 k 1 0 125 W AEC Q200 Grade 0 0805 0805 ERJ 6ENF1102V Panasonic 0 7 68k RES 7 68 k...

Page 31: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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