Texas Instruments TPS23734, User Manual

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User’s Guide
PoE Powered Devices Debug Guidelines
ABSTRACT
This document provides the debug process for TI Power over Ethernet (PoE) Powered Device (PD) designs.
Most problems occur in the DC/DC design. PoE uses the IEEE802.3 standard that includes IC vendors
and end-equipment designs, resulting in strict requirements for PoE operation. However, there are no such
requirements on DC/DC design. Unfortunately, the complex nature of DC/DC design leaves less margin of error
than one might expect, yet many degrees of freedom in design choices. This combination allows errors to slip in
undetected that can result in designs that do not work or cause damage.
Table of Contents
1 Introduction ............................................................................................................................................................................. 2
2 Preparation and Measurement Techniques .......................................................................................................................... 2
2.1 Important PoE Signals....................................................................................................................................................... 2
2.2 Lab Equipment................................................................................................................................................................... 3
2.3 Measurement Techniques.................................................................................................................................................. 3
2.4 Board Preparation.............................................................................................................................................................. 4
3 Narrowing Down the Problem Area ....................................................................................................................................... 5
3.1 Schematic Areas................................................................................................................................................................ 5
3.2 Narrowing Down the Area On Board................................................................................................................................ 15
4 Common Issues .................................................................................................................................................................... 17
5 Conclusion ............................................................................................................................................................................ 20
List of Figures
Figure 2-1. PoE Start-up.............................................................................................................................................................. 3
Figure 2-2. Switching Waveform.................................................................................................................................................. 4
Figure 3-1. PoE Input Section...................................................................................................................................................... 5
Figure 3-2. PoE IC Settings......................................................................................................................................................... 6
Figure 3-3. Input Filter................................................................................................................................................................. 7
Figure 3-4. DC/DC Pin Settings................................................................................................................................................... 7
Figure 3-5. VCC Input Circuit for Active Clamp Forward............................................................................................................. 8
Figure 3-6. VCC Input Circuit for Primary-Side Regulation Flyback............................................................................................ 8
Figure 3-7. VCC Input Circuit for Optocoupler Flyback............................................................................................................... 8
Figure 3-8. Primary Side Feedback PSR Flyback....................................................................................................................... 9
Figure 3-9. Primary Side Feedback Optocoupler Flyback........................................................................................................... 9
Figure 3-10. Primary Side MOSFETs and Accompanying Components (Flyback).................................................................... 10
Figure 3-11. Primary Side MOSFET RCD Snubber................................................................................................................... 11
Figure 3-12. Secondary Side Diode Rectified Flyback.............................................................................................................. 12
Figure 3-13. Secondary Side Self Driven Synchronous Flyback A............................................................................................ 12
Figure 3-14. Secondary Side Self Driven Synchronous Flyback B............................................................................................ 13
Figure 3-15. Secondary Side Driven Synchronous Flyback...................................................................................................... 13
Figure 3-16. Secondary Side Active Clamp Forward................................................................................................................. 14
Figure 3-17. Output Capacitance............................................................................................................................................... 14
Figure 3-18. Secondary Side Optocoupler Feedback Network................................................................................................. 15
Figure 3-19. PoE Handshake.................................................................................................................................................... 15
Figure 3-20. PoE DC/DC Start-up............................................................................................................................................. 16
Figure 3-21. Current Sense Switching Waveform...................................................................................................................... 17
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SLVAF74 – JULY 2021
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