Multicore Fixed and Floating-Point System-on-Chip
Copyright 2012 Texas Instruments Incorporated
Device Configuration
85
SPRS689D—March 2012
TMS320C6670
3.4 Pullup/Pulldown Resistors
Proper board design should ensure that input pins to the device always be at a valid logic level and not floating. This
may be achieved via pullup/pulldown resistors. The device features internal pullup (IPU) and internal pulldown
(IPD) resistors on most pins to eliminate the need, unless otherwise noted, for external pullup/pulldown resistors.
An external pullup/pulldown resistor needs to be used in the following situations:
•
Device Configuration Pins:
If the pin is both routed out and are not driven (in Hi-Z state), an external
pullup/pulldown resistor must be used, even if the IPU/IPD matches the desired value/state.
•
Other Input Pins:
If the IPU/IPD does not match the desired value/state, use an external pullup/pulldown
resistor to pull the signal to the opposite rail.
For the device configuration pins (listed in
), if they are both routed out and are not driven (in Hi-Z state),
it is strongly recommended that an external pullup/pulldown resistor be implemented. Although, internal
pullup/pulldown resistors exist on these pins and they may match the desired configuration value, providing
external connectivity can help ensure that valid logic levels are latched on these device configuration pins. In
addition, applying external pullup/pulldown resistors on the device configuration pins adds convenience to the user
in debugging and flexibility in switching operating modes.
Tips for choosing an external pullup/pulldown resistor:
•
Consider the total amount of current that may pass through the pullup or pulldown resistor. Make sure to
include the leakage currents of all the devices connected to the net, as well as any internal pullup or pulldown
resistors.
•
Decide a target value for the net. For a pulldown resistor, this should be below the lowest V
IL
level of all inputs
connected to the net. For a pullup resistor, this should be above the highest V
IH
level of all inputs on the net.
A reasonable choice would be to target the V
OL
or V
OH
levels for the logic family of the limiting device; which,
by definition, have margin to the V
IL
and V
IH
levels.
•
Select a pullup/pulldown resistor with the largest possible value that can still ensure that the net will reach the
target pulled value when maximum current from all devices on the net is flowing through the resistor. The
current to be considered includes leakage current plus, any other internal and external pullup/pulldown
resistors on the net.
•
For bidirectional nets, there is an additional consideration that sets a lower limit on the resistance value of the
external resistor. Verify that the resistance is small enough that the weakest output buffer can drive the net to
the opposite logic level (including margin).
•
Remember to include tolerances when selecting the resistor value.
•
For pullup resistors, also remember to include tolerances on the DVDD rail.
For most systems:
•
A 1-k
Ω
resistor can be used to oppose the IPU/IPD while meeting the above criteria. Users should confirm this
resistor value is correct for their specific application.
•
A 20-k
Ω
resistor can be used to compliment the IPU/IPD on the device configuration pins while meeting the
above criteria. Users should confirm this resistor value is correct for their specific application.
For more detailed information on input current (I
I
), and the low-level/high-level input voltages (V
IL
and V
IH
) for
the TMS320C6670 device, see Section 6.3
‘‘Electrical Characteristics’’
To determine which pins on the device include internal pullup/pulldown resistors, see
Summary of Contents for TMS320C6670
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