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TMS320C6670 Peripheral Information and Electrical Specifications
Copyright 2012 Texas Instruments Incorporated
SPRS689D—March 2012
Multicore Fixed and Floating-Point System-on-Chip
TMS320C6670
Figure 7-40
HyperLink Station Management Clock Timing
Figure 7-41
HyperLink Station Management Transmit Timing
<xx> represents the interface that is being used: PM or FL
Figure 7-42
HyperLink Station Management Receive Timing
<xx> represents the interface that is being used: PM or FL
4
tosu(MCMTXPMDAT-MCMTXPMCLKL)
Setup time - MCMTXPMDAT valid before MCMTXPMCLK low
0.25*C2-0.4
ns
5
toh(MCMTXPMCLKL-MCMTXPMDAT)
Hold time - MCMTXPMDAT valid after MCMTXPMCLK low
0.25*C2-0.4
ns
End of Table 7-71
Table 7-71
HyperLink Peripheral Switching Characteristics (Part 2 of 2)
(see
Figure 7-40
,
Figure 7-41
and
Figure 7-42
)
No.
Parameter
Min
Max
Unit
2
3
1
5
4
5
4
MCMT
X
<xx>CLK
MCMT
X
<xx>DAT
7
6
7
6
MCMR
X
<xx>CLK
MCMR
X
<xx>DAT
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