Texas Instruments TMS320C28x, Reference Manual

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Program Flow
2-39 Central Processing Unit
2.5 Program Flow
The program control logic and program-address generation logic work togeth-
er to provide proper program flow. Normally, the flow of a program is sequen-
tial: the CPU executes instructions at consecutive program-memory address-
es. At times, a discontinuity is required; that is, a program must branch to a
nonsequential address and then execute instructions sequentially at that new
location. For this purpose, the ’28x supports interrupts, branches, calls, re-
turns, and repeats.
Proper program flow also requires smooth flow at the instruction level. To meet
this need, the ’28x has a protected pipeline and an instruction-fetch mecha-
nism that attempts to keep the pipeline full.
2.5.1 Interrupts
Interrupts are hardware- or software-driven events that cause the CPU to sus-
pend its current program sequence and execute a subroutine called an inter-
rupt service routine. Interrupts are described in detail in Chapter 3.
2.5.2 Branches, Calls, and Returns
Branches, calls, and returns break the sequential flow of instructions by trans-
ferring control to another location in program memory. A branch only transfers
control to the new location. A call
also saves the return address (the address
of the instruction following the call). Called subroutines or interrupt service rou-
tines are each concluded with a return instruction, which takes the return ad-
dress from the stack or from XAR7 or RPC and places it into the program
counter (PC).
The following branch instructions are conditional: B, BANZ, BAR, BF, SB, SBF,
XBANZ, XCALL, and XRETC. They are executed only if a certain specified or
predefined condition is met. For detailed descriptions of these instructions,
see Chapter 6,
Assembly Language Instructions .
2.5.3 Repeating a Single Instruction
The repeat (RPT) instruction allows the execution of a single instruction
(N + 1) times, where N is specified as an operand of the RPT instruction. The
instruction is executed once and then repeated N times. When RPT is
executed, the repeat counter (RPTC) is loaded with N. RPTC is then decrem-
ented every time the repeated instruction is executed, until RPTC equals 0. For
a description of RPT and a list of repeatable instructions, see Chapter 6,
As-
sembly Language Instructions .