Reference Tables for C2xLP Code Migration Topics
D-13
C2xLP Migration Guidelines
8. C2xLp and C28x Differences in Memory Maps (Continued)
C28x
C2xLP
Migration topic
9
CNF bit mapping of B0
Block
CNF bit maps B0 in data and
program memory
CNF =0
−
B0 in data memory
Range: 0x0300
−
0x03FF
: 0x0400
−
0x04FF
CNF =1
−
B0 in program memory
Range: 0xFE00
−
0xFEFF
: 0xFF00
−
0xFFFF
Not applicable
10
Vector table range
Size: 32x16 words
Range: 0x0000
−
0x003F
Size 32x32 words
0x3F FFC0 – 0x3F FFFF
−
at reset
In C28x based DSP devices may use
additional expanded vector table
(e.g., PIE)
11
Internal SARAM mapping
in data memory
Mapped as internal memory map Reserved for emulation registers
Range : 0x0800
−
0x1000h
5
I/O space
Range : 0x0000
−
0xFFFFh
Range : 0x0x00 000
−
0x00 FFFFh
I/O Space may or may not be imple-
mented on a particular device. See
the device datasheet for details.
6
Global space
Range : 0x8000
−
0xFFFFh
Implemented via the XINTF
Global Space may or may not be im-
plemented on a specific C28x device.
See the device datasheet for details.
Table D
−
9. C2xLP and C28x Differences in Instructions and Registers
Migration topic
C2xLP
C28x
1
Conditional Instructions
Branches, Calls, Returns
Can take more than one condi-
tion in these instructions
The C28x assembler will automatical-
ly break the instructions into multiple
instructions.
2
When are CPU Flags up-
dated?
Conditional flags update on Ac-
cumulator operation only
Conditional flags update on Accumu-
lator, register and memory operations
3
Repeat instructions
Many instructions are repeatable
Same instructions are repeatable.
For additional repeatable instructions
see Table E
Summary of Contents for TMS320C28x
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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