Texas Instruments TMS320C28x, Reference Manual

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QMACL P,loc32,*XAR7/++
6-300
QMACL P,loc32,*XAR7/++ Signed 32 X 32-bit Multiply and Accumulate (Upper Half)
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
QMACL P,loc32,*XAR7
0101 0110 0100 1111
1100 0111 LLLL LLLL
1 Y N+2
QMACL P,loc32,*XAR7++
0101 0110 0100 1111
1000 0111 LLLL LLLL
1 Y N+2
Operands P Product register
loc32 Addressing mode (see Chapter 5)
Note: The @ACC addressing mode cannot be used when the instruction is repeated. No
illegal instruction trap will be generated if used (assembler will flag an error).
*XAR7/
++
Indirect program − memory addressing using auxiliary register XAR7,
can access full 4Mx16 program space range (0x000000 to 0x3FFFFF)
Description 32-bit x 32-bit signed multiply and accumulate. First, add the previous
product (stored in the P register), shifted as specified by the product shift
mode (PM), to the ACC register. Then, multiply the signed 32-bit content of
the location pointed to by the “loc32” addressing mode by the signed 32-bit
content of the program − memory location pointed to by the XAR7 register
and store the upper 32 − bits of the 64-bit result in the P register. If specified,
post − increment the XAR7 register by 2:
ACC = ACC + P << PM;
P = (signed T * signed Prog[*XAR7 or *XAR7++]) >> 32;
On the C28x devices, memory blocks are mapped to both program and data
space (unified memory), hence the ”*XAR7/++” addressing mode can be
used to access data space variables that fall within the program space
address range.
With some addressing mode combinations, you can get conflicting
references. In such cases, the C28x will give the “loc16/loc32” field priority
on changes to XAR7. For example:
QMACL P,*−−XAR7,*XAR7++ ; −−XAR7 given priority
QMACL P,*XAR7++,*XAR7 ; *XAR7++ given priority
QMACL P,*XAR7,*XAR7++ ; *XAR7++ given priority
Flags and
Modes
Z After the addition, the Z flag is set if the ACC value is zero, else Z is cleared.
N After the addition, the N flag is set if bit 31 of the ACC is 1, else N is cleared.
C If the addition generates a carry, C is set; otherwise C is cleared.
V
If an overflow occurs, V is set; otherwise V is not affected.
OVC If overflow mode is disabled; and if the operation generates a positive
overflow, then the counter is incremented. If overflow mode is disabled; and if
the operation generates a negative overflow, then the counter is
decremented.