Texas Instruments TMS320C28x, Reference Manual

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LCR *XARn
6-124
LCR *XARn Long Indirect Call Using RPC
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
LCR *XARn
0011 1110 0110 0RRR
1 − 4
Operands *XARn indirect program-memory addressing using auxiliary register XAR0 to
XAR7, can access full 4Mx16 program space range (0x000000 to
0x3FFFFF)
Description Long indirect call using return PC pointer (RPC). The current RPC value is
pushed onto the software stack, pointed to by SP register, in two 16-bit
operations. Next, the RPC register is loaded with the return address. Next,
the destination address stored in the XARn register is loaded into the PC:
[SP] = RPC(15:0);
SP = SP + 1;
[SP] = RPC(21:16);
SP = SP + 1;
RPC = PC + 1;
PC = XARn(21:0);
Note: The LCR and LRETR operations, enable 4 cycle call and 4 cycle return. The standard
LC and LRET operations only enable a 4 cycle call and 8 cycle return. The LCR and
LRETR operations can be nested and can freely replace the LC and LRET operations.
This is the case on interrupts also. Only on a task switch operation, does the RPC need
to be manually saved and restored.
Flags and
Modes
None
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
; Call to subroutines in SwitchTable selected by Switch value:
SwitchTable: ; Switch address table:
.long Switch0 ; Switch0 address
.long Switch1 ; Switch1 address
.
MOVL XAR2,#SwitchTable ; XAR2 = pointer to SwitchTable
MOVZ AR0,@Switch ; AR0 = Switch index
MOVL XAR6,*+XAR2[AR0] ; XAR6 = SwitchTable[Switch]
LCR *XAR6 ; Indirect RPC call using XAR6
.
Switch0: ; Subroutine 0:
.
.
LRETR ; RPC Return
Switch1: ; Subroutine 1:
.
LRETR ; RPC Return