Table 8-4. MEMTIM0 Register Configuration versus Frequency
EEPROM Wait
States (
EWS
)
EEPROM Bank
Clock Edge
(
EBCE
)
EEPROM Bank Clock
High Time (
EBCHT
)
Time Period Range (t) in ns
CPU Frequency range (f)
in MHz
0x0
1
0x0
62.5
16
0x1
0
0x2
62.5 > t ≥ 25
16 < f ≤ 40
0x2
0
0x3
25 > t ≥ 16.67
40 < f ≤60
0x3
0
0x4
16.67 > t ≥ 12.5
60< f ≤80
0x4
0
0x5
12.5 > t ≥ 10
80 < f ≤100
0x5
0
0x6
10 > t ≥ 8.33
100< f ≤120
Note:
The associated Flash and EEPROM fields in the
MEMTIM0
register must be programmed
to the same values. For example, the
FWS
field must be programmed to the same value as
the
EWS
field.
Locking and Passwords
The EEPROM can be locked at both the module level and the block level. The lock is controlled by
a password that is stored in the
EEPROM Password (EEPASSn)
registers and can be any 32-bit
to 96-bit value other than all 1s. Block 0 is the master block, the password for block 0 protects the
control registers as well as all other blocks. Each block can be further protected with a password
for that block.
If a password is registered for block 0, then the whole module is locked at reset. As a result, the
EEBLOCK
register cannot be changed from 0 until block 0 is unlocked.
A password registered with any block, including block 0, allows for protection rules that control
access of that block based on whether it is locked or unlocked. Generally, the lock can be used to
prevent write accesses when locked or can prevent read and write accesses when locked.
All password protected blocks are locked at reset. To unlock a block, the correct password value
must be written to the
EEPROM Unlock (EEUNLOCK)
register by writing to it once, twice, or three
times, depending on the size of the password. A block or the module may be re-locked by writing
0xFFFF.FFFF to the
EEUNLOCK
register because 0xFFFF.FFFF is not a valid password.
Protection and Access Control
The
PROT
protection field in the
EEPROM Protection (EEPROT)
register provides discrete control
of read and write access for each block which allows various protection models per block. The
protection configurations allowed are as follows:
■
PROT
= 0x0
– Without password: Readable and writable at any time. This mode is the default when there
is no password.
– With password: Readable, but only writable when unlocked by the password. This mode is
the default when there is a password.
■
PROT
= 0x1
– With password: Readable or writable only when unlocked.
– This value has no meaning when there is no password.
617
June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C1294NCPDT Microcontroller
