Register 1: System Exception Raw Interrupt Status (SYSEXCRIS), offset 0x000
The
SYSEXCRIS
register is the raw interrupt status register. On a read, this register gives the
current raw status value of the corresponding interrupt. A write has no effect.
System Exception Raw Interrupt Status (SYSEXCRIS)
Base 0x400F.9000
Offset 0x000
Type RO, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FPIDCRIS
FPDZCRIS
FPIOCRIS
FPUFCRIS
FPOFCRIS
FPIXCRIS
reserved
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00
RO
reserved
31:6
Floating-Point Inexact Exception Raw Interrupt Status
Description
Value
No interrupt
0
A floating-point inexact exception has occurred.
1
This bit is cleared by writing a 1 to the
IXCIC
bit in the
SYSEXCIC
register.
0
RO
FPIXCRIS
5
Floating-Point Overflow Exception Raw Interrupt Status
Description
Value
No interrupt
0
A floating-point overflow exception has occurred.
1
This bit is cleared by writing a 1 to the
OFCIC
bit in the
SYSEXCIC
register.
0
RO
FPOFCRIS
4
Floating-Point Underflow Exception Raw Interrupt Status
Description
Value
No interrupt
0
A floating-point underflow exception has occurred.
1
This bit is cleared by writing a 1 to the
UFCIC
bit in the
SYSEXCIC
register.
0
RO
FPUFCRIS
3
June 18, 2014
524
Texas Instruments-Production Data
Processor Support and Exception Module