
3.3 Outputs
C7 and C8 are installed with 0.1-uF capacitors. If a 100-Ω differential probe is unavailable to measure the LVDS
output, these capacitors allow for the AC portion of the signal to be seen on a 50-Ω terminated scope. Keep
in mind that any duty cycle other than 50% will result in a DC portion of the signal that is not halfway between
V
OH
and V
OL
. As mentioned earlier, this is because of the charging and discharging of the capacitors. A higher
duty cycle will result in a higher DC output voltage because the capacitors are charging more than they are
discharging.
+
–
GND
V
CC
V
EE
C7
0.1uF
C8
0.1uF
OUT+
OUT-
GND
Figure 3-4. Output Side Schematic
If equipment is available to measure the LVDS output with a respect to the 100-Ω resistor or with a differential
probe, then C7 and C8 can be replaced with 0-Ω resistors to keep the DC integrity of the output signal.
Board Setup
8
TLV3811EVM User’s Guide
SNOU189 – MAY 2022
Copyright © 2022 Texas Instruments Incorporated