Input Power
4
SLLU317 – January 2020
Copyright © 2020, Texas Instruments Incorporated
TL16C750EEVM User's Guide
3
Input Power
The EVM receives its power through the banana jack inputs denoted as J27 for ground and J26 for a 5 V
input to a power supply. When power is applied to the EVM through these banana jacks, LED D5 lights up
to signify that power is present. The expected voltage on the input power J26 is 5 V as this is a common
processor voltage range (a larger voltage should not be used). The input voltage can be lower depending
on V
DO
of the LDO (this is output current dependent). V
INPUT
should be greater than V
LDO
+ V
DO
+ V
F
if the
LDO is being used. V
DO
is the drop out voltage of the LDO, V
LDO
is the regulated voltage of the LDO, and
V
F
is the forward voltage of the schottky diode in front of the LDO denoted as D7. If more than 70 mA is
being sourced by the LDO then D7 should be removed, and the connection between D7 can be shorted.
Figure 3. Input Power Image
