Texas Instruments Tiva TM4C123GH6PM, User Manual

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Floating-Point Unit (FPU)
9.2.1.8 ROM_FPUStackingDisable
Disables the stacking of floating-point registers.
Prototype:
void
ROM_FPUStackingDisable(void)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_FPUTABLE
is an array of pointers located at
ROM_APITABLE[26]
.
ROM_FPUStackingDisable
is a function pointer located at
ROM_FPUTABLE[7]
.
Description:
This function disables the stacking of floating-point registers s0-s15 when an interrupt is han-
dled. When floating-point context stacking is disabled, floating-point operations performed in
an interrupt handler destroy the floating-point context of the main thread of execution.
Returns:
None.
9.2.1.9 ROM_FPUStackingEnable
Enables the stacking of floating-point registers.
Prototype:
void
ROM_FPUStackingEnable(void)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_FPUTABLE
is an array of pointers located at
ROM_APITABLE[26]
.
ROM_FPUStackingEnable
is a function pointer located at
ROM_FPUTABLE[8]
.
Description:
This function enables the stacking of floating-point registers s0-s15 when an interrupt is han-
dled. When enabled, space is reserved on the stack for the floating-point context and the
floating-point state is saved into this stack space. Upon return from the interrupt, the floating-
point context is restored.
If the floating-point registers are not stacked, floating-point instructions cannot be safely exe-
cuted in an interrupt handler because the values of s0-s15 are not likely to be preserved for
the interrupted code. On the other hand, stacking the floating-point registers increases the
stacking operation from 8 words to 26 words, also increasing the interrupt response latency.
Returns:
None.
86 April 8, 2013