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Synchronous Serial Interface (SSI)
ui32SSIClk
is the rate of the clock supplied to the SSI module.
ui32Protocol
specifies the data transfer protocol.
ui32Mode
specifies the mode of operation.
ui32BitRate
specifies the clock rate.
ui32DataWidth
specifies number of bits transferred per frame.
Description:
This function configures the synchronous serial interface. It sets the SSI protocol, mode of
operation, bit rate, and data width.
The
ui32Protocol
parameter defines the data frame format.
The
ui32Protocol
parameter
can be one of the following values:
SSI_FRF_MOTO_MODE_0
,
SSI_FRF_MOTO_MODE_1
,
SSI_FRF_MOTO_MODE_2
,
SSI_FRF_MOTO_MODE_3
,
SSI_FRF_TI
, or
SSI_FRF_NMW
.
The Motorola frame formats imply the following polarity and phase configurations:
Polarity Phase
Mode
0
0
SSI_FRF_MOTO_MODE_0
0
1
SSI_FRF_MOTO_MODE_1
1
0
SSI_FRF_MOTO_MODE_2
1
1
SSI_FRF_MOTO_MODE_3
The
ui32Mode
parameter defines the operating mode of the SSI module. The SSI mod-
ule can operate as a master or slave; if a slave, the SSI can be configured to disable out-
put on its serial output line. The
ui32Mode
parameter can be one of the following values:
SSI_MODE_MASTER
,
SSI_MODE_SLAVE
, or
SSI_MODE_SLAVE_OD
.
The
ui32BitRate
parameter defines the bit rate for the SSI. This bit rate must satisfy the follow-
ing clock ratio criteria:
FSSI
>
= 2
∗
bit rate (master mode)
FSSI
>
= 12
∗
bit rate (slave modes)
where FSSI is the frequency of the clock supplied to the SSI module.
The
ui32DataWidth
parameter defines the width of the data transfers, and can be a value
between 4 and 16, inclusive.
The peripheral clock is the same as the processor clock.
This is the value returned by
, or it can be explicitly hard-coded if it is constant and known (to save
the code/execution overhead of a call to
Returns:
None.
17.2.1.5 ROM_SSIDataGet
Gets a data element from the SSI receive FIFO.
Prototype:
void
ROM_SSIDataGet(uint32_t ui32Base,
uint32_t *pui32Data)
188
April 8, 2013
Summary of Contents for Tiva TM4C123GH6PM
Page 26: ...Boot Loader 26 April 8 2013...
Page 68: ...Controller Area Network CAN 68 April 8 2013...
Page 122: ...Hibernation Module 122 April 8 2013...
Page 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Page 152: ...Memory Protection Unit MPU 152 April 8 2013...
Page 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Page 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Page 222: ...System Control 222 April 8 2013...
Page 270: ...UART 270 April 8 2013...
Page 296: ...uDMA Controller 296 April 8 2013...
Page 351: ...April 8 2013 351...