Texas Instruments TDP0604, User Manual

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Table 2-2. Jumpers (continued)
Jumper Default Position Description
JMP15 Short 4 to 6 SCL and CFG0.
Short 1 to 3:
I2C clock from TUSB3410 (U7).
Short 3 to 5: I2C clock from Aardvark connector (J5).
Short 2 to 4: CFG0 pulled up to VIO (3.3 V). Refer to data sheet for details on CFG0.
Short 4 to 6: CFG0 pull-down to GND. Refer to data sheet for details on CFG0.
JMP16 Short 4 to 6 SDA and CFG1.
Short 1 to 3:
I2C data from TUSB3410 (U7).
Short 3 to 5: I2C data from Aardvark connector (J5).
Short 2 to 4: CFG1 pulled up to VIO (3.3 V). Refer to data sheet for details on CFG1.
Short 4 to 6: CFG1 pull-down to GND. Refer to data sheet for details on CFG1.
J25 Short 2 to 3 HPDOUT_SEL.
Short 1 to 2:
HPD_OUT is open drain.
Short 2 to 3: HPD_OUT is push-pull.
J27 Short 2 to 3 AC_EN
Short 1 to 2:
OUT_D[2:0] and OUT_CLK is AC-coupled. Make sure R171, R172, R173, R174,
R175, R176, R177, and R178 are populated with 100nF capacitor or make sure AC capacitor is
external to EVM board.
Short 2 to 3: OUT_D[2:0] and OUT_CLK is DC-coupled. Make sure R171, R172, R173, R174,
R175, R176, R177, and R178 are populated with 0-ohm resistor.
J31 Short 2 to 3 DDC Level Shifter enable/disable
Short 1 to 2:
Discrete DDC level shifter (U23) disabled.
Short 2 to 3: Discrete DDC level shifter (U23) enabled.
J32 Short 1 to 2 VIO Voltage.
Short 1 to 2:
VIO connected to board 3.3 V.
OPEN: VIO is from an external supply.
2.4 Rx EQ Configuration
There are sixteen EQ settings with 0 being the lowest and Fh being the highest. Refer to data sheet for specific
EQ value.
Table 2-3. Rx Equalization Control
Register(s): CLK_EQ, D0_EQ,
D1_EQ, D2_EQ
Equalization Setting #
EQ1 PIN Level EQ0 PIN Level EQ Gain
0 0 0 Lowest EQ setting.
1 0 R
2 0 F
3 0 1
4 R 0
5 R R
6 R F
7 R 1
8 F 0
9 F R
10 F F
11 F 1
12 1 0
13 1 R
14 1 F
15 1 1 Highest EQ setting
Hardware Configuration www.ti.com
4 TDP0604 EVM User's Guide SLAU865 – DECEMBER 2021
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