45
90
135
180
0
225
270
315
360
Position of the Ch1
phase of the slave
Master
Ch1
Master
Ch2
Master
Ch3
Master
Ch4
Slave
Ch1
45
90
135
180
0
225
270
315
360
Position of the Ch1
phase of the slave
Master
Ch1
Master
Ch2
Master
Ch3
Master
Ch4
Slave
Ch1
22.5
TAS54x4C Hardware Design Guidelines
1.3.1.1
Option 1: 45° Phase
Option 1 includes the following features:
•
Eight switching phases in each output cycle (0°, 45°, 90°, 135°, 180°, 225°, 270°, 315°)
•
Device 1 switching phase: 0°, 45°, 90°, 135°, 180°, 225°, 270°, 315°
•
Device 2 switching phase: 22.5°, 67.5°, 112.5°, 157.5°, 202.5°, 247.5°, 292.5°, 337.5° (offset by 22.5°
which is half of the switching phase)
•
The best EMI performance out of all the options (16 switching phases per output cycle allows for more
energy distribution)
•
Reduced harmonic crosstalk because there is no 90° offset phase, but the performance of Option 2 is
better
1.3.1.2
Option 2: 180° Phase
Option 2 includes the following features:
•
Two switching phases in each output cycle (0° and 180°)
•
Device 1 switching phase: 0° and 180°
•
Device 2 switching phase: 90° and 270° (offset by 90° which is half of the switching phase)
45° Phase
180° Phase
Figure 2. Clock Synchronization Options
NOTE:
The PCB layout for the OSC_SYNC should be a direct route or the shortest route from the
master to slave devices for best operation. A star connection is preferred instead of a daisy
chain.
The REXT resistor that sets the 20-MHz oscillator must still be used in the slave devices.
The 20-MHz oscillator is still needed to derive the clock for the internal state machine.
The REXT pin is sensitive. Caution should be used when taking any measurements at this
point. Measurements should be taken with high impedance and low capacitance methods,
because micro amperes of current can change the performance of the TAS54x4C devices.
An external oscillator can also be used to drive one or many TAS54x4C devices in a system. The
oscillator must have a frequency between 2.85 MHz and 4 MHz to maintain proper functionality. To use all
four I
2
C addresses in a system and an external clock, a special I
2
C register bit is available that allows the
master address to use an external clock. In register 0x0B, set bit D6 to 1.
6
TAS54x4C Design Guide
SLOA196 – June 2014
Copyright © 2014, Texas Instruments Incorporated
