Texas Instruments RM48 series, Technical Reference Manual

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Control Registers
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1164 SPNU503C – March 2018
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Multi-Buffered Serial Peripheral Interface Module (MibSPI) with Parallel Pin
Option (MibSPIP)
24.9.11 SPI Pin Control Register 5 (SPIPC5)
NOTE: Register bits vary by device
Register bits 31:24 and 23:16 of this register reflect the number of SIMO/SOMI data lines per
device. On devices with 8 data-line support, all of bits 31 to 16 are implemented. On devices
with less than 8 data lines, only a subset of these bits are available. Unimplemented bits
return 0 upon read and are not writable.
Figure 24-36. SPI Pin Control Register 5 (SPIPC5) [offset = 28h]
31 24 23 16
SOMICLR SIMOCLR
R/W-U R/W-U
15 12 11 10 9 8
Reserved SOMICLR0 SIMOCLR0 CLKCLR ENACLR
R-0 R/W-U R/W-U R/W-U R/W-U
7 0
SCSCLR
R/W-U
LEGEND: R/W = Read/Write; R = Read only; U = Undefined; - n = value after reset
Table 24-18. SPI Pin Control Register 5 (SPIPC5) Field Descriptions
Bit Field Value Description
31-24 SOMICLR SPISOMI[x] data out clear. This pin is only active when the SPISOMI[x] pin is configured as a
general-purpose output pin.
Bit 11 or bit 24 can be used to set the SPISOMI[0] pin. If a 32-bit write is performed, bit 11
will have priority over bit 24.
0 Read: The current value on SPISOMI[x] is 0.
Write: Writing a 0 to this bit has no effect.
1 Read: The current value on SPISOMI[x] is 1.
Write: Logic 0 is placed on SPISOMI[x] pin, if it is in general-purpose output mode.
23-16 SIMOCLR SPISIMO[x] data out clear. This bit is only active when the SPISIMO[x] pin is configured as a
general-purpose output pin.
Bit 10 or bit 16 can be used to set the SPISIMO[0] pin. If a 32-bit write is performed, bit 10
will have priority over bit 16.
0 Read: The current value on SPISIMO[x] is 0.
Write: Writing a 0 to this bit has no effect.
1 Read: The current value on SPISIMO[x] is 1.
Write: Logic 0 is placed on SPISIMO[x] pin, if it is in general-purpose output mode.
15-12 Reserved 0 Reads return 0. Writes have no effect.
11 SOMICLR0 SPISOMI[0] data out clear. This pin is only active when the SPISOMI[0] pin is configured as a
general-purpose output pin.
0 Read: The current value on SPISOMI[0] is 0.
Write: Writing a 0 to this bit has no effect.
1 Read: The current value on SPISOMI[0] is 1.
Write: Logic 0 is placed on SPISOMI[0] pin, if it is in general-purpose output mode.
10 SIMOCLR0 SPISIMO[0] data out clear. This pin is only active when the SPISIMO[0] pin is configured as a
general-purpose output pin.
0 Read: The current value on SPISIMO[0] is 0.
Write: Writing a 0 to this bit has no effect.
1 Read: The current value on SPISIMO[0] is 1.
Write: Logic 0 is placed on SPISIMO[0] pin, if it is in general-purpose output mode.