Texas Instruments RM48 series, Technical Reference Manual

Page: 1161 / 1759

www.ti.com
Control Registers
1161 SPNU503C – March 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
Multi-Buffered Serial Peripheral Interface Module (MibSPI) with Parallel Pin
Option (MibSPIP)
24.9.9 SPI Pin Control Register 3 (SPIPC3)
NOTE: Register bits vary by device
Register bits 31:24 and 23:16 of this register reflect the number of SIMO/SOMI data lines per
device. On devices with 8 data-line support, all of bits 31 to 16 are implemented. On devices
with less than 8 data lines, only a subset of these bits are available. Unimplemented bits
return 0 upon read and are not writable.
Figure 24-34. SPI Pin Control Register 3 (SPIPC3) [offset = 20h]
31 24 23 16
SOMIDOUT SIMODOUT
R/W-U R/W-U
15 12 11 10 9 8
Reserved SOMIDOUT0 SIMODOUT0 CLKDOUT ENADOUT
R-0 R/W-U R/W-U R/W-U R/W-U
7 0
SCSDOUT
R/W-U
LEGEND: R/W = Read/Write; R = Read only; U = Undefined; - n = value after reset
Table 24-16. SPI Pin Control Register 3 (SPIPC3) Field Descriptions
Bit Field Value Description
31-24 SOMIDOUT SPISOMI[x] data out write. This bit is only active when the SPISOMI[x] pin is configured as a
general-purpose I/O pin and configured as an output pin. The value of this bit indicates the value
sent to the pin.
Bit 11 or bit 24 can be used to set the direction for pin SPISOMI[0]. If a 32-bit write is
performed, bit 11 will have priority over bit 24.
0 Current value on SPISOMI[x] pin is logic 0.
1 Current value on SPISOMI[x] pin is logic 1
23-16 SIMODOUT SPISIMO[x] data out write. This bit is only active when the SPISIMO[x] pin is configured as a
general-purpose I/O pin and configured as an output pin. The value of this bit indicates the value
sent to the pin.
Bit 10 or bit 16 can be used to set the direction for pin SPISIMO[0]. If a 32-bit write is
performed, bit 10 will have priority over bit 16.
0 Current value on SPISIMO[x] pin is logic 0.
1 Current value on SPISIMO[x] pin is logic 1.
15-12 Reserved 0 Reads return 0. Writes have no effect.
11 SOMIDOUT0 SPISOMI[0] data out write. This bit is only active when the SPISOMI[0] pin is configured as a
general-purpose I/O pin and configured as an output pin. The value of this bit indicates the value
sent to the pin.
0 Current value on SPISOMI[0] pin is logic 0.
1 Current value on SPISOMI[0] pin is logic 1.
10 SIMODOUT0 SPISIMO[0] data out write. This bit is only active when the SPISIMO[0] pin is configured as a
general-purpose I/O pin and configured as an output pin. The value of this bit indicates the value
sent to the pin.
0 Current value on SPISIMO[0] pin is logic 0.
1 Current value on SPISIMO[0] pin is logic 1.
9 CLKDOUT SPICLK data out write. This bit is only active when the SPICLK pin is configured as a general-
purpose I/O pin and configured as an output pin. The value of this bit indicates the value sent to the
pin.
0 The SPICLK pin is logic 0.
1 The SPICLK pin is logic 1.