MPU Memory Management Unit
2-45
MPU Subsystem
If the access generates an alignment fault, the access sequence aborts with-
out checking access rights.
If a nonaligned read access is executed and the alignment fault is disabled,
data is accessed at a word address and rotated inside the core as shown be-
low. If a nonaligned half-word or word write is executed while the alignment
fault is disabled, the write is done on a half-word or word address boundary.
Figure 2–21 is an example of read word access on byte 11.
Figure 2–21. Nonaligned Read Word Access
11
10
01
00
aa
bb
cc
dd
bb
cc
dd
aa
Word address in memory
Read Access on Address Byte 11
Word is rotated inside the MPU core
2.7.11.2
Translation Fault
There are two types of translation fault: section and page.
-
A section translation fault is generated if the level 1 descriptor is marked
as invalid. This happens if bits [1–0] of the descriptor are both 0.
-
A page translation fault is generated if the page table entry is marked as
invalid. This happens if bits [1–0] of the page table entry are both 0.
2.7.11.3
Domain Fault
There are two types of domain faults: section and page. In both cases, the level
1 descriptor holds the 4-bit domain field that selects one of the sixteen 2-bit
domains in the domain access control register. The two bits of the specified
domain are then checked for access permissions, as detailed in Table 2.15.
-
In the case of a section, the domain is checked once the level 1 descriptor
is returned.
-
In the case of a page, the domain is checked once the page table entry is
returned.
A section or page domain fault occurs if the permission access is either no
access (00) or reserved (10).
2.7.11.4
Permission Fault
There are two types of permission faults: section and subpage. Permission
fault is checked at the same time as the domain fault. If the 2-bit domain field
returns client (01), then the permission access check is invoked as follows:
