Camera Interface
7-8
7.2.1.5
FIFO Buffer (128 x 32)
A write access is applied to the FIFO for each 32-bit word received. When
the write FIFO counter reaches the trigger level, an interrupt request can be
generated. The trigger level is programmable.
In DMA mode, you can program the threshold between 1 and 128, but the DMA
must be set up to read the threshold amount out of FIFO per the DMA request
issued by the camera interface. Otherwise, the locking mechanism is never
rearmed, thus preventing DMA requests from being issued after every read.
A pulse on the DMA request (see Figure 7-7 and Figure 7-8) occurs when the
number of words in the FIFO is above the threshold. The DMA request occurs
if the number of remaining words is above the threshold and the system DMA
has completed the transfer (number of words read by the DMA = threshold).
The camera FIFO continues to fill (up to its maximum 128 values) when an
interrupt or DMA request has been generated but not yet responded to. When
a data value is read from the camera FIFO, another IRQ or DMA request is
immediately generated as long as the amount of data present in the FIFO is
above the trigger level.
Figure 7-7. DMA Request
Threshold
= n
DMA Req
Fifo Read
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
FIFO Full
n DMA
Read
n DMA
Read
