Texas Instruments OMAP36 Series, Technical Reference Manual

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IVA2.2 Subsystem Register Manual
Table 5-484. SYSC_LICFG1
Address Offset 0x048
Physical address 0x01C2 0048 Instance IVA2.2 SYSC
Description This register allows controlling various parameters of the IVA2.2 local interconnect network
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved APINTERVAL
Bits Field Name Description Type Reset
31:5 Reserved Write 0s for future compatibility. RW 0x0000000
Read returns 0.
4:0 APINTERVAL Control of the Aged Priority (priority inversion) for DMA accesses: RW 0x00
When set to 0x0, the aged priority is disabled
When set to another value, this controls how often the priority is
adjusted: every APInterval cycles, the priority of the port is
decreased until the associated request is accepted or the priority of
the port equals 0. The priority of the port is reinitialized to the
transaction priority each time a new VBUS command is generated,
i.e. the last one has been accepted.
0x0: Aged Priority Disabled:
There is no aged priority in SCR. DMA transaction keeps
the fixed priority defined internally, and has to wait for the
bus to be freed by higher priority initiators
Table 5-485. Register Call Summary for Register SYSC_LICFG1
IVA2.2 Subsystem Functional Description
• Interconnect Optimization : [0]
IVA2.2 Subsystem Basic Programming Model
• Prioritizing Defined Transfers : [1] [2]
IVA2.2 Subsystem Register Manual
• SYSC Register Mapping Summary : [3]
Table 5-486. SYSC_BOOTADDR
Address Offset 0x100
Physical address 0x01C2 0100 Instance IVA2.2 SYSC
Description This register defines the physical address of the IVA2 boot loader. This is a copy of the
CONTROL_IVA2_BOOTADDR when the IVA2 is released from reset.
Type R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
BOOTLOADADDR Reserved
Bits Field Name Description Type Reset
31:12 BOOTLOADADDR Physical address of the IVA2 boot loader: R 0x-----
This is the read-only copy of the CONTROL_IVA2_BOOTADDR
when the IVA2 is released fromreset
This is an index to a 4K-byte page
11:0 Reserved Read returns 0. R 0x000
983 SWPU177N – December 2009 – Revised November 2010 IVA2.2 Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated