Public Version
IVA2.2 Subsystem Basic Programming Model
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register by writing the bit position of the next codeword.
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IVA.
ring buffer start address register: See , Input and Output Data.
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IVA.
ring buffer end address register: See , Input and Output Data. The
CTLTAB_DCY Y control look-up table base address register holds the pointer to the UVLD control
table for luminance DC coefficients. The address is relative to the base address of the iVLCD Huffman
table memory buffer and must be 32-bit-aligned.
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IVA.
control look-up table base address register: Holds the pointer to the UVLD
control table for chrominance UV DC coefficients. The address is relative to the base address of the
iVLCD Huffman table memory and must be 32-bit-aligned.
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IVA.
(i = 0) control look-up table base address register: Holds the pointer to the
UVLD control table for INTER AC coefficients. The address is relative to the base address of the
iVLCD Huffman table memory and must be 32-bit-aligned.
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IVA.
(i = 1) control look-up table base address register: Holds the pointer to the
UVLD control table for INTRA AC coefficients. The address is relative to the base address of the
iVLCD Huffman table memory and must be 32-bit-aligned.
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IVA.
symbol look-up table address offset register holds the offset value used to
address the symbol table DC Y table. The purpose of this offset is to avoid negative numbers being
used in the control table.
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IVA.
symbol look-up table address offset register: Holds the offset value used
to address the symbol table DC UV table. The purpose of this offset is to avoid negative numbers
being used in the control table.
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IVA.
(i = 0) symbol look-up table address offset register: Holds the offset value
used to address the INTER AC symbol table. The purpose of this offset is to avoid negative numbers
being used in the control table.
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IVA.
(i = 1) symbol look-up table address offset register: Holds the offset value
used to address the INTRA AC symbol table. The purpose of this offset is to avoid negative numbers
being used in the control table.
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IVA.
symbol look-up table base address register: Holds the address pointer to
the starting word of the UVLD symbol table DC Y. This address is relative to the base address of the
iVLCD coefficient buffer and must be 32-bit-aligned.
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IVA.
(i = 0) symbol look-up table base address register: Holds the address pointer
to the starting word of the UVLD INTER AC symbol table. This address is relative to the base address
of the iVLCD coefficient buffer and must be 32-bit-aligned.
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IVA.
(i = 1) symbol look-up table base address register: Holds the address pointer
to the starting word of the UVLD INTRA AC symbol table AC 1. This address is relative to the base
address of the iVLCD coefficient buffer and must be 32-bit-aligned
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IVA.
number of bits register: Specifies the number of bits to test for the DC
term as input to UVLD. It equals the maximum length of a Huffman codeword. Bits 0-4 are associated
with the UV terms and bits 8-12 with the Y terms.
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IVA.
number of bits register: Specifies the number of bits to test for the AC
term as input to UVLD. It equals the maximum length of a Huffman codeword. Bits 0-4 are associated
with the AC-1 terms and bits 8-12 with the AC-0 terms. VLD_CTL - iVLCD VLD control register
controls:
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Bits 4, 5, 6, and 7 specify whether UVLD tables for AC1, AC0, DCUV, DCY, respectively, are
leading codeword bit 1 or leading codeword 0. For the first case, the bits must be set to 1, for the
second case, the bits must be set to 0.
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Bits 0, 1, 2, and 3 indicate the number of bits to represent the symbol in each entry of the UVLD
symbol tables. Bit 0 is for AC1, bit 1 is for AC0, bit 2 is for DC UV, and bit 3 is for DC Y. If the bit is
set to 0, the 11-bit symbol is used; otherwise, the 12-bit symbol is used.
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IVA.
bit-vector register: States which blocks are treated as luminance blocks.
This information is necessary because the Huffman table differs from luminance to chrominance data.
For a complete description of this register, see
, IVA2.2 Subsystem Register Manual.
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IVA.
coded block pattern register: MPEG mode; must be updated after each
macroblock processing. It specifies which 8x8 blocks of each macroblock must be decoded. For each
macroblock there is a corresponding CBP value, which is stored along the bitstream in a header
section. In JPEG mode, this register is ignored and every block is decoded.
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IVA2.2 Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
