Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 3380 / 3738

Local host or
DMA access
mmci_cmd
MMCi_DMA_RX
mmci_dat0
Buffer Level
Command Response
Data
Time
Buffer full
Buffer empty
BLEN
bytes
LH sends a
read command
DMA read access
(BLEN reads)
From host
to card
From card
to host
From card
to host
Read transfer active
MMCn.MMCHS_PSTATE[9]
RTA = 0x1
Card starts
sending data
into the buffer
Card completes sending
data into the buffer and
DMA request set after
BLEN reached
Request cleared after first
DMA read
Command
complete IRQ Transfer
complete IRQ
Interrupt request
CRC
status
mmchs-018
Data
mmci_dat[7:1]
Public Version
MMC/SD/SDIO Integration
www.ti.com
• One DMA request per block
Figure 24-18. DMA Receive Mode
24.3.2.1.2 DMA Transmit Mode
In a DMA block write operation (single or multiple), the request signal MMCi_DMA_TX is asserted to its
active level when a complete block is to be written to the buffer. The block size transfer is specified in the
MMCi.
MMCHS_BLK [10:0] BLEN field.
The MMCi_DMA_TX signal is deasserted to its inactive level when the sDMA has written one single word
to the buffer.
Only one request is sent per block; the DMA controller can make a 1-shot write access or multiple write
DMA bursts, in which case the DMA controller must manage the number of burst accesses, according to
block size BLEN field.
New DMA requests are internally masked if the sDMA has not written exactly BLEN bytes (as DMA
accesses are in 32-bit, then the number of sDMA read is Integer(BLEN/4)+1) and if there is not enough
memory space to write a complete block in the buffer.
Summary (see Figure 24-19 ):
• DMA transfer size = BLEN buffer size (maximum 1024 32-bit words) in one shot or by burst
• One DMA request per block
3380 MMC/SD/SDIO Card Interface SWPU177N – December 2009 – Revised November 2010
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