Texas Instruments OMAP36 Series, Technical Reference Manual

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UART/IrDA/CIR Register Manual
Bits Field Name Description Type Reset
31:2 Reserved Read returns 0. R 0x0000000
1 TXFIFO_EMPTY_STS Used to generate interrupt if the TX_FIFO is empty RW 1
(software flow control)
0x0: TXFIFO_EMPTY interrupt not pending.
0x1: TXFIFO_EMPTY interrupt pending.
0 RXFIFO_EMPTY_STS Used to generate interrupt if the RX_FIFO is empty RW 1
(software flow control)
0x0: RXFIFO_EMPTY interrupt not pending.
0x1: RXFIFO_EMPTY interrupt pending.
Table 19-128. Register Call Summary for Register ISR2_REG
UART/IrDA/CIR Functional Description
• Register Access Modes : [0] [1] [2] [3] [4] [5]
• UART/IrDA (SIR, MIR, FIR)/CIR Mode Selection : [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23]
UART/IrDA/CIR Register Manual
• UART/IrDA/CIR Register Summary : [24] [25]
Table 19-129. MDR3_REG
Address Offset 0x080
Physical Address Instance UART
See Table 19-39 to Table 19-40
Description Mode definition register 3.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
DISABLE_CIR_RX_DEMOD
Bits Field Name Description Type Reset
31:1 Reserved Read returns 0. R 0x0000000
0 DISABLE_CIR_RX_DEMOD Used to enable CIR RX demodulation. RW 0
0x0: Enables CIR RX demodulation.
0x1: Disables CIR RX demodulation.
Table 19-130. Register Call Summary for Register MDR3_REG
UART/IrDA/CIR Functional Description
• Register Access Modes : [0] [1] [2] [3] [4] [5]
• UART/IrDA (SIR, MIR, FIR)/CIR Mode Selection : [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23]
UART/IrDA/CIR Register Manual
• UART/IrDA/CIR Register Summary : [24] [25]
2973 SWPU177N – December 2009 – Revised November 2010 UART/IrDA/CIR
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