Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 2613 / 3738

Public Version
www.ti.com
SCM Register Manual
Bits Field Name Description Type Reset
31 RESERVED Reserved for non-GP devices Reserved 0x0
30 SDRCSHARINGLOCK Exported value to SDRC.SDRC_SHARING[30] R/W 0x0
For more information, see Section 13.4.9 , SDRC
Registers
29:0 SDRCSHARING Exported value to SDRC.SDRC_SHARING[29:0] R/W 0x00002700
For more information, see Section 13.4.9 , SDRC
Registers
Table 13-183. Register Call Summary for Register CONTROL_SDRC_SHARING
SCM Functional Description
• SDRC Registers : [0] [1] [2]
SCM Register Manual
• SCM Register Summary : [3]
Table 13-184. CONTROL_SDRC_MCFG0
Address Offset 0x0000 01F4
Physical Address 0x4800 2464 Instance GENERAL
Description SDRC MCFG Configuration register-0
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SDRCMCFG0
RESERVED
SDRCMCFG0LOCK
Bits Field Name Description Type Reset
31 RESERVED Reserved for non-GP devices Reserved 0x0
30 SDRCMCFG0LOCK Exported value to SDRC.SDRC_MCFG_0[30] R/W 0x0
For more information, see Section 13.4.9 , SDRC
Registers
29:0 SDRCMCFG0 Exported value to SDRC.SDRC_MCFG_0[29:0] R/W 0x00300000
For more information, see Section 13.4.9 , SDRC
Registers
Table 13-185. Register Call Summary for Register CONTROL_SDRC_MCFG0
SCM Functional Description
• SDRC Registers : [0] [1] [2]
SCM Register Manual
• SCM Register Summary : [3]
2613 SWPU177N – December 2009 – Revised November 2010 System Control Module
Copyright © 2009–2010, Texas Instruments Incorporated