Texas Instruments OMAP36 Series, Technical Reference Manual

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SCM Register Manual
Table 13-83. CONTROL_PADCONF_CAPABILITIES
REGISTER NAME Pad name Physical address WakeUpx Off Mode Input Reserved PU/PD MuxMode
Enable
CONTROL_PADCONF_SDRC_D0[15:0] sdrc_d0 0x48002030 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D0[31:16] sdrc_d1 0x48002030 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D2[15:0] sdrc_d2 0x48002034 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D2[31:16] sdrc_d3 0x48002034 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D4[15:0] sdrc_d4 0x48002038 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D4[31:16] sdrc_d5 0x48002038 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D6[15:0] sdrc_d6 0x4800203C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D6[31:16] sdrc_d7 0x4800203C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D8[15:0] sdrc_d8 0x48002040 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D8[31:16] sdrc_d9 0x48002040 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D10[15:0] sdrc_d10 0x48002044 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D10[31:16] sdrc_d11 0x48002044 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D12[15:0] sdrc_d12 0x48002048 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D12[31:16] sdrc_d13 0x48002048 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D14[15:0] sdrc_d14 0x4800204C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D14[31:16] sdrc_d15 0x4800204C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D16[15:0] sdrc_d16 0x48002050 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D16[31:16] sdrc_d17 0x48002050 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D18[15:0] sdrc_d18 0x48002054 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D18[31:16] sdrc_d19 0x48002054 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D20[15:0] sdrc_d20 0x48002058 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D20[31:16] sdrc_d21 0x48002058 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D22[15:0] sdrc_d22 0x4800205C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D22[31:16] sdrc_d23 0x4800205C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D24[15:0] sdrc_d24 0x48002060 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D24[31:16] sdrc_d25 0x48002060 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D26[15:0] sdrc_d26 0x48002064 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D26[31:16] sdrc_d27 0x48002064 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D28[15:0] sdrc_d28 0x48002068 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D28[31:16] sdrc_d29 0x48002068 -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D30[15:0] sdrc_d30 0x4800206C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_D30[31:16] sdrc_d31 0x4800206C -- ----- 0b1 0b000 0b00 ---
CONTROL_PADCONF_SDRC_CLK[15:0] sdrc_clk 0x48002070 -- ----- 0b1 0b000 0b00 ---
2557 SWPU177N – December 2009 – Revised November 2010 System Control Module
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