Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 2492 / 3738

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SCM Functional Description
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Table 13-34. Internal Signals Multiplexed on OBSMUX4 (continued)
Out Signal Name Muxed Signal Name OBSMUX4 Field Description High State Low State
CONTROL. CONTROL_
DEBOBS_2 [22:16]
(dec)
mpu_PIIRQ (112:17) Interrupt request lines mapped – –
to the interrupt controller. See
Chapter 12 , Interrupt Controller,
for more information about
these interrupt lines.
Reserved (127:113) – – –
Table 13-35. Internal Signals Multiplexed on OBSMUX5
Out Signal Name Muxed Signal Name OBSMUX5 Field Description High State Low State
CONTROL. CONTROL_D
EBOBS_2 [6:0] (dec)
CORE_OBSMUX5
(1)
tie_low 0 - – -
PRCM_RM_ICLK 1 Interface clock of the RM block – –
PRCM_DPLL1_initz 2 Lock sequence initialization – –
(HLH) of DPLL1
PRCM_DPLL4_initz 3 Lock sequence initialization – –
(HLH) of DPLL4
CM_SysClkIsRunning 4 Indicates whether the system The clock is The clock is
clock is running or not running. not running.
PRCM_IVA2_domain 5 Indicates whether the IVA2 Domain is Domain is
Nready domain is ready. In other not ready. ready.
words, is domain transition
ongoing?
PRCM_CAM_forceSl 6 Indicates whether the CAM Sleep mode Sleep mode
eep domain is forced to sleep mode is forced. is not forced.
PRCM_EMU_domain 7 Indicates whether the EMU Domain is Domain is
Nready domain is ready. In other not ready. ready.
words, is domain transition
ongoing?
Reserved (12:8) – – –
PRCM_CORE_L4_ 13 Interface clock of the L4 – –
GICLK interconnect
Reserved (16:14) – – –
mpu_PIIRQ (112:17) Interrupt request lines mapped – –
to the interrupt controller. See
Chapter 12 , Interrupt Controller,
for more information about
these interrupt lines.
Reserved (127:113) – – –
(1)
0x00 in WKUPOBSMUX5 field CONTROL.CONTROL_WKUP_DEBOBS_1[12:8]
Table 13-36. Internal Signals Multiplexed on OBSMUX6
Out Signal Name Muxed Signal Name OBSMUX6 Field Description High State Low State
CONTROL. CONTROL
_DEBOBS_3 [22:16]
(dec)
CORE_OBSMUX6
(1)
tie_low 0 - – -
PRCM_FUNC_96M_FCL 1 96-MHz functional clock – –
K
PRCM_DPLL1_enable 2 Signal used to enable DPLL1 DPLL is DPLL is
enabled. disabled.
PRCM_DPLL4_enable 3 Signal used to enable DPLL4 DPLL is DPLL is
enabled. disabled.
(1)
0x00 in WKUPOBSMUX6 field CONTROL.CONTROL_WKUP_DEBOBS_1[20:16]
2492 System Control Module SWPU177N – December 2009 – Revised November 2010
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