Texas Instruments OMAP36 Series, Technical Reference Manual

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SCM Functional Description
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Table 13-4. Core Control Module Pad Configuration Register Fields (continued)
Register Name Physical Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7
Address
CONTROL_PADCONF_ETK_D6[31:16] 0x4800 25E8 etk_d7 mcspi3_cs sdmmc3_d hsusb1_data gpio_21 mm1_txen hsusb1_tll_ hw_dbg9
1 at7 3 _n data3
CONTROL_PADCONF_ETK_D8[15:0] 0x4800 25EC etk_d8 Reserved sdmmc3_d hsusb1_dir gpio_22 hsusb1_tll_ hw_dbg10
for Non-GP at6 dir
devices
CONTROL_PADCONF_ETK_D8[31:16] 0x4800 25EC etk_d9 Reserved sdmmc3_d hsusb1_nxt gpio_23 mm1_rxdm hsusb1_tll_ hw_dbg11
for Non-GP at5 nxt
devices
CONTROL_PADCONF_ETK_D10[15:0] 0x4800 25F0 etk_d10 uart1_rx hsusb2_clk gpio_24 hsusb2_tll_ hw_dbg12
clk
CONTROL_PADCONF_ETK_D10[31:16] 0x4800 25F0 etk_d11 hsusb2_stp gpio_25 mm2_rxdp hsusb2_tll_ hw_dbg13
stp
CONTROL_PADCONF_ETK_D12[15:0] 0x4800 25F4 etk_d12 Reserved hsusb2_dir gpio_26 hsusb2_tll_ hw_dbg14
for Non-GP dir
devices
CONTROL_PADCONF_ETK_D12[31:16] 0x4800 25F4 etk_d13 hsusb2_nxt gpio_27 mm2_rxdm hsusb2_tll_ hw_dbg15
nxt
CONTROL_PADCONF_ETK_D14[15:0] 0x4800 25F8 etk_d14 hsusb2_data gpio_28 mm2_rxrcv hsusb2_tll_ hw_dbg16
0 data0
CONTROL_PADCONF_ETK_D14[31:16] 0x4800 25F8 etk_d15 hsusb2_data gpio_29 mm2_txse0 hsusb2_tll_ hw_dbg17
1 data1
Table 13-5. Core Control Module D2D Pad Configuration Register Fields
Register Name Physical Mode0 Mode1 Mode2 Mode3 Mode4 Mode5 Mode6 Mode7
Address
CONTROL_PADCONF_SAD2D_MCAD0[15:0] 0x4800 21E4 sad2d_mcad mad2d_mc
0 ad0
CONTROL_PADCONF_SAD2D_MCAD0[31:16] 0x4800 21E4 sad2d_mcad mad2d_mc
1 ad1
CONTROL_PADCONF_SAD2D_MCAD2[15:0] 0x4800 21E8 sad2d_mcad mad2d_mc
2 ad2
CONTROL_PADCONF_SAD2D_MCAD2[31:16] 0x4800 21E8 sad2d_mcad mad2d_mc
3 ad3
CONTROL_PADCONF_SAD2D_MCAD4[15:0] 0x4800 21EC sad2d_mcad mad2d_mc
4 ad4
CONTROL_PADCONF_SAD2D_MCAD4[31:16] 0x4800 21EC sad2d_mcad mad2d_mc
5 ad5
CONTROL_PADCONF_SAD2D_MCAD6[15:0] 0x4800 21F0 sad2d_mcad mad2d_mc
6 ad6
2458System Control Module SWPU177N – December 2009 – Revised November 2010
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