Texas Instruments OMAP36 Series, Technical Reference Manual

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L4 Interconnects
Bits Field Name Description Type Reset
0 OCP_RESET The OCP_RESET field controls the OCP reset signal to the attached RW 0
core. Setting this bit clears any pending transfers and resets the OCP
interface. The bit must be cleared to de-assert the OCP reset signal.
When the software reset feature is available on a target agent, the
target agent OCP must also have a reset signal directed to the target
core.
Table 9-188. Register Call Summary for Register L4_TA_AGENT_CONTROL_L
L4 Interconnects
• Error Logging : [0] [1] [2] [3] [4]
• TA Software Reset : [5] [6]
• Operational Modes Configuration : [7] [8] [9] [10]
• L4 Target Agent (L4 TA) : [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32]
[33] [34] [35] [36]
Table 9-189. L4_TA_AGENT_CONTROL_H
Address Offset 0x024
Physical Address See Table 9-153 to Table 9-178
Description Enable clock power management
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved Reserved
EXT_CLOCK
Bits Field Name Description Type Reset
31:9 Reserved Read returns 0. R 0x000000
8 EXT_CLOCK When set to 1, the ext_clk_off_i signal on a target agent indicates R 0
when the target agent should shut off.
7:0 Reserved Read returns 0. R 0x00
Table 9-190. Register Call Summary for Register L4_TA_AGENT_CONTROL_H
L4 Interconnects
• L4 Target Agent (L4 TA) : [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24]
[25]
Table 9-191. L4_TA_AGENT_STATUS_L
Address Offset 0x028
Physical Address See Table 9-153 to Table 9-178
Description Error reporting
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved Reserved Reserved
REQ_TIMEOUT
2095 SWPU177N – December 2009 – Revised November 2010 Interconnect
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