Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 1003 / 3738

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IVA2.2 Subsystem Register Manual
Table 5-523. WUGEN_PENDEVTCLR2
Address Offset 0x108
Physical address 0x01C2 1108 Instance IVA2.2 WUGEN
Description This register clears the masked pending dma_requests:
Write 0: No effect
Write 1: Clears the corresponding mask bit in the
WUGEN_PENDEVT2 register
Reads always return 0
Type W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
PENDDMARQ9 PENDDMARQ8 PENDDMARQ7 PENDDMARQ6 PENDDMARQ5 PENDDMARQ4 PENDDMARQ3 PENDDMARQ2 PENDDMARQ1 PENDDMARQ0
PENDDMARQ19 PENDDMARQ18 PENDDMARQ17 PENDDMARQ16 PENDDMARQ15 PENDDMARQ14 PENDDMARQ13 PENDDMARQ12 PENDDMARQ11 PENDDMARQ10
Bits Field Name Description Type Reset
31:20 Reserved Write 0s for future compatibility. W 0x000
19 PENDDMARQ19 Masked pending dma request number 0 W 0
18 PENDDMARQ18 Masked pending dma request number 0 W 0
17 PENDDMARQ17 Masked pending dma request number 0 W 0
16 PENDDMARQ16 Masked pending dma request number 0 W 0
15 PENDDMARQ15 Masked pending dma request number 0 W 0
14 PENDDMARQ14 Masked pending dma request number 0 W 0
13 PENDDMARQ13 Masked pending dma request number 0 W 0
12 PENDDMARQ12 Masked pending dma request number 0 W 0
11 PENDDMARQ11 Masked pending dma request number 0 W 0
10 PENDDMARQ10 Masked pending dma request number 0 W 0
9 PENDDMARQ9 Masked pending dma request number 0 W 0
8 PENDDMARQ8 Masked pending dma request number 0 W 0
7 PENDDMARQ7 Masked pending dma request number 0 W 0
6 PENDDMARQ6 Masked pending dma request number 0 W 0
5 PENDDMARQ5 Masked pending dma request number 0 W 0
4 PENDDMARQ4 Masked pending dma request number 0 W 0
3 PENDDMARQ3 Masked pending dma request number 0 W 0
2 PENDDMARQ2 Masked pending dma request number 0 W 0
1 PENDDMARQ1 Masked pending dma request number 0 W 0
0 PENDDMARQ0 Masked pending dma request number 0 W 0
Table 5-524. Register Call Summary for Register WUGEN_PENDEVTCLR2
IVA2.2 Subsystem Register Manual
• WUGEN Register Mapping Summary : [0]
1003 SWPU177N – December 2009 – Revised November 2010 IVA2.2 Subsystem
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