Texas Instruments MSP430F6777 Manual Download

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Errata

MSP430F6777 Microcontroller

ABSTRACT

This document describes the known exceptions to the functional specifications (advisories).

Table of Contents

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2 Preprogrammed Software Advisories

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3 Debug Only Advisories

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4 Fixed by Compiler Advisories

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5 Nomenclature, Package Symbolization, and Revision Identification

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5.1 Device Nomenclature.........................................................................................................................................................

5.2 Package Markings..............................................................................................................................................................

5.3 Memory-Mapped Hardware Revision (TLV Structure).......................................................................................................

6 Advisory Descriptions

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7 Revision History

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Table of Contents

SLAZ476AD – DECEMBER 2012 – REVISED MAY 2021

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MSP430F6777 Microcontroller

Summary of Contents for MSP430F6777

Page 1: ...visories 3 4 Fixed by Compiler Advisories 3 5 Nomenclature Package Symbolization and Revision Identification 4 5 1 Device Nomenclature 4 5 2 Package Markings 4 5 3 Memory Mapped Hardware Revision TLV...

Page 2: ...DMA10 LCDB6 PMM11 PMM12 PMM14 PMM15 PMM18 PMM20 PMM26 PORT15 PORT19 PORT26 RTC8 SD3 SYS16 UCS11 USCI36 USCI37 USCI41 USCI42 USCI47 USCI50 2 Preprogrammed Software Advisories Advisories that affect fac...

Page 3: ...sion Errata Number Rev A CPU21 CPU22 CPU40 Refer to the following MSP430 compiler documentation for more details about the CPU bugs workarounds TI MSP430 Compiler Tools Code Composer Studio IDE MSP430...

Page 4: ...ully qualified development support product XMS devices and X development support tools are shipped against the following disclaimer Developmental product is intended for internal evaluation purposes M...

Page 5: ...n how to locate the TLV structure and read out the HW_ID can be found in the device User s Guide www ti com Nomenclature Package Symbolization and Revision Identification SLAZ476AD DECEMBER 2012 REVIS...

Page 6: ...l repeat sequence of channels ADC12CTL1 ADC12CONSEQx In addition the timer overflow flag cannot be used to detect an overflow ADC12IFGR2 ADC12TOVIFG Workaround 1 For manual trigger mode ADC12CTL0 ADC1...

Page 7: ...ot switch back to DVCC after DVCC ramps back up again Similarly when the system is running with the AUXVCC2 supply after DVCC AVCC is lost if the AUXVCC2 voltage goes lower than SVSH setting for POR a...

Page 8: ...applicable for AUXVCC2 of up to maximum voltage 3 58V while a lower SVSMRRL setting can be selected if a lower voltage e g 3 3V is expected on AUXVCC2 Or Connect all 3 supplies via 3 external diodes t...

Page 9: ...east one of the following 1 Output inversion is disabled CECTL CEOUTPOL 0 OR 2 Change pin configuration from CEOUT to GPIO with output low CPU21 CPU Module Category Compiler Fixed Function Using POPM...

Page 10: ...Studio v4 0 x or later User is required to add the compiler or assembler flag option below silicon_errata CPU22 MSP430 GNU Compiler MSP430 GCC MSP430 GCC 4 9 build 167 or later CPU36 CPU Module Categ...

Page 11: ...truction is 0X40h or 0X50h where X don t care which could either be an instruction opcode for instructions like RRCM RRAM RLAM RRUM with PC as destination register or a data section const data in flas...

Page 12: ...FRIE1 VMAIE if it is enabled This issue occurs if the POPM assembly instruction is performed up to the top of the STACK Workaround If the user is utilizing C they will not be impacted by this issue Al...

Page 13: ...bytes are affected In free running mode the last 4 bytes are affected Workaround Edit the linker command file to make the last 4 or 8 bytes of affected memory sections unavailable to avoid PC modifyi...

Page 14: ...all eUSCI_B modes SPI and I2C are affected Workaround 1 Use Interrupt Service Routines to transfer data to and from the eUSCI_A or eUSCI_B OR 2 When using DMA channel 0 for transferring data to and fr...

Page 15: ...breakpoint is hit or when the debug session is halted Workaround This erratum has been addressed in MSPDebugStack version 3 5 0 1 It is also available in released IDE EW430 IAR version 6 30 3 and CCS...

Page 16: ...as MSP430 DLL v3 4 3 4 OR b Roll back the debug stack by either performing a clean re installation of a previous version of the IDE or by manually replacing the debug stack with a prior version such a...

Page 17: ...fied Clock System Control 5 Register UCSCTL5 to divide MCLK by two prior to entering LPM3 or LPM4 set DIVMx 001 This prevents MCLK from running out of spec when the CPU wakes from the low power mode F...

Page 18: ...Functional Function Device may not wake up from LPM2 LPM3 or LPM4 Description Device may not wake up from LPM2 LPM3 or LMP4 if an interrupt occurs within 1 us after the entry to the specified LPMx en...

Page 19: ...l mode Instead force the modules to remain ON even in LPMx Note that this will cause increased power consumption when in LPMx Refer to the MSP430 Driver Library MSPDRIVERLIB for proper PMM configurati...

Page 20: ...and LPM4 PMM20 PMM Module Category Functional Function Unexpected SVSL SVML event during wakeup from LPM2 3 4 in fast wakeup mode Description If PMM low side is configured to operate in fast wakeup m...

Page 21: ...pin reset function after access to SVSMHCTL or SVSMLCTL To prevent lock up caused by use case 2 a timeout for the SVSMLDLYIFG flag check should be implemented to 300us PORT15 PORT Module Category Func...

Page 22: ...e off the tamper detection function triggered by RTCCAP0 and RTCCAP1 pins cannot get a correct time stamp value Workaround None SD3 SD Module Category Functional Function Incorrect conversion result i...

Page 23: ...r OFIFG clearing USCI36 USCI Module Category Functional Function UCLKI not usable in I2C master mode Description When EUSCIB is configured as I2C Master with the external UCLKI as clock source the UCL...

Page 24: ...h byte in multi byte transmission Description UCTXCPTIFG flag is triggered at the last stop bit of every UART byte transmission independently of an empty buffer when transmitting multiple byte sequenc...

Page 25: ...in master mode with UCSTEM 0 STE pin used as an input to prevent conflicts with other SPI masters data that is moved into UCxTXBUF while the UCxSTE input is in the inactive state may not be transmitte...

Page 26: ...2019 to May 19 2021 Page Changed the document format and structure updated the numbering format for tables figures and cross references throughout the document 6 Revision History www ti com 26 MSP430...

Page 27: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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