background image

GND_EN_IN

GND_EN_IN

EN pin to GND 

(Output disabled)

EN pin to VIN

(Output enabled)

User's Guide

SNVU487 – September 2015

LP5910YKA EVM User Guide

1

Introduction

The Texas Instruments LP5910YKA evaluation module (EVM) helps designers evaluate the operation and
performance of the LP5910 LDO voltage regulator. The LP5910YKA EVM contains one LP5910 LDO
voltage regulator in the DSBGA / YKA package (see

Table 1

).

Table 1. Device Information

EVM ORDERABLE NUMBER

OUTPUT VOLTAGE

PART NAME

PACKAGE

LP5910YK18AEVM

1.8 V

LP5910-1.8YKAR

4-pin YKA (DSBGA)

2

Setup

This section describes the jumpers and connectors on the EVM as well and how to properly connect, set
up and use the LP5910YKA EVM.

The device has been designed to work with 1-µF input and output ceramic capacitors down to 0402
component size.

2.1

Input/Output Connector Descriptions

VIN

and

GNDIN

are the connection terminals for the input supply. The VIN terminal is the positive

connection, and the GNDIN terminal is the negative (ground) connection.

VOUT

and

GNDOUT

are the connection terminals for the output load. The VOUT terminal is the positive

connection, and the GNDOUT terminal is the negative (ground) connection.

GND_EN_IN

is a 3-pin terminal used to enable, or disable, the LP5910.

When the shunt is across EN_IN terminal pins the the Enable (EN) pin is directly connected to VIN. The
LP5910 will be enabled when VIN is applied.

When the shunt is across the GND_IN terminal pins the EN pin is connected directly to GND. The LP5910
will be disabled.

The shunt must be in place, or the EN terminal pin must be driven by an off-board supply, otherwise the
LP5910 EN pin is floating, and the EN status my be undefined. The default, and recommended, shunt
position is across the EN_IN terminal pins (enabled).

Figure 1. EN Jumper Settings

2.2

Setup

The recommended operating input voltage range for the LP5910YKA EVM is V

OUT

+ 0.5 V (minimum) to

3.3 V (maximum).

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1

SNVU487 – September 2015

LP5910YKA EVM User Guide

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Copyright © 2015, Texas Instruments Incorporated

Summary of Contents for LP5910-1.8YKAR

Page 1: ...and the GNDIN terminal is the negative ground connection VOUT and GNDOUT are the connection terminals for the output load The VOUT terminal is the positive connection and the GNDOUT terminal is the negative ground connection GND_EN_IN is a 3 pin terminal used to enable or disable the LP5910 When the shunt is across EN_IN terminal pins the the Enable EN pin is directly connected to VIN The LP5910 w...

Page 2: ...minal and the GNDOUT terminal for proper operation Load current should be maintained between 1 mA and 300 mA Figure 2 LP5910YKA EVM Setup 2 LP5910YKA EVM User Guide SNVU487 September 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated ...

Page 3: ...ints for optional end launch SMA connectors Emerson 142 0701 851 or equivalent at VIN J2 and VOUT J1 for noise or PSRR testing 3 Board Layout Figure 4 through Figure 9 show the board layout for the LP5910YKA EVM PCB The EVM offers a jumper terminal to program the EN pin status and spare footprints for assorted capacitors for the input and output The LP5910 will dissipate power The 4 pin YKA DSBGA ...

Page 4: ...2 GND Plane Figure 7 Layer 3 GND Plane Figure 8 Bottom Layer Routing Figure 9 Bottom Assembly Layer and Silk Screen 4 LP5910YKA EVM User Guide SNVU487 September 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated ...

Page 5: ...www ti com LP5910YKAEVM Schematic 4 LP5910YKAEVM Schematic 5 SNVU487 September 2015 LP5910YKA EVM User Guide Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated ...

Page 6: ...Keystone 1 Red Standard Banana Jack Insulated VOUT 108 0907 001 Cinch 1 Yellow Header 2 pin 100 mil spacing JVIN JVOUT HTSW 102 07 G S Samtec 2 Header 3 pin 100 mil spacing GND_EN_IN HTSW 103 07 G S Samtec 1 Shunt 100 mil Gold plated Black SH J1 SNT 100 BK G Samtec 1 Ultra Low Noise 300 mA Linear Regulator for RF and Analog U1 LP5910 1 8YKAR TI 1 Circuits Requires No Bypass Capacitor PCB 2 inch 2 ...

Page 7: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Page 8: ... by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la rég...

Page 9: ... connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors cu...

Page 10: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Page 11: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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