Texas Instruments LMK04208, User Manual

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Offset (Hz)
P
h
a
se
No
is
e
(d
B
c/
Hz)
10 100 1000 10000 100000 1000000 1E+7 5E+7
-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
D002
LVDS, SE
LVDS, Balun
LVCMOS (Norm/Inv), SE
LVPECL16 /w 240 ohm em, SE
LVPECL16 /w 240 ohm em, Balun
Clock Output Phase Noise Measurements
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30 SNAU200 – September 2016
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Typical Phase Noise Performance Plots
B.2 Clock Output Phase Noise Measurements
The LMK04208 features programmable LVDS, LVPECL, and LVCMOS output modes. Below is a phase
noise measurement of CLKout0 for LVPECL and CLKout4 for LVDS and LVCMOS outputs. When
measured single ended (SE) the unmeasured output is terminated using a 50-
Ω termination. Balun
measurements are made using the Prodyn BIB-100G balun. Measurements are provided for 245.75 MHz
and 2949.12 MHz. The default populated VG-4513CA-122.8800M-GFCT3 Epson VCXO is used for
measurements. The note 240 ohm em refers to the emitter resistors of the AC coupled LVPECL output
are 240
Ω .
B.2.1 CLKout 245.76 MHz
Figure 19. LMK04208 245.76 MHz, Divide-by-12
Table 10. 245.76 MHz Clock Output Phase Noise (dBc/Hz)
Offset LVDS, SE LVDS, Balun
LVCMOS
(Norm/Inv), SE
LVPECL16 /w 240
ohm em, SE
LVPECL16 /w 240
ohm em, Balun
10 Hz -78.3 -77.3 -77.2 -77.7 -79.1
100 Hz -99.8 -99.9 -101 -100.0 -100.9
1 kHz -122.7 -122.9 -122.0 -122.7 -122.8
10 kHz -133.5 -133.6 -132.1 -133.7 -134.2
100 kHz -136.0 -136.1 -136.0 -136.2 -136.5
1 MHz -147.6 -147.5 -148.4 -148.7 -149.1
5 MHz -155.0 -154.5 -157.4 -157.3 -158.0
10 MHz -154.8 -155.6 -158.2 -158.6 -159.1
20 MHz -155.1 -155.5 -157.9 -158.5 -158.5
40 MHz -153.5 -155.2 -158.1 -158.8 -159.9
Table 11. 245.76 MHz Clock Output Jitter (fs RMS)
Offset LVDS, SE LVDS, Balun
LVCMOS
(Norm/Inv), SE
LVPECL16 /w 240
ohm em, SE
LVPECL16 /w 240
ohm em, Balun
100 Hz to 20 MHz 139.3 136.5 126.3 125.5 121.7
12 kHz to 20 MHz 117.1 116.1 103.4 101.4 97.7