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Schematic
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SNVU621C – May 2019 – Revised December 2019
Copyright © 2019, Texas Instruments Incorporated
LM61460-Q1 EVM User's Guide
PG —
To monitor the PGOOD/RESET pin
The PGOOD flag indicates whether the output voltage is within the regulation band. The PGOOD
pin of the device is an open-drain output and it is pulled up to V
OUT
on this board through a pullup
resistor. This flag is high impedance when the output voltage is in regulation.
Vinj —
To aid when making bode plots
There is a low value resistor, Rinj, between VOUT and this node. This feedback divider of the board
is connected to this node as well. Stimulus can be applied between this node and VOUT when
taking measurements for bode plots.
VOUTS —
Kelvin sensing for VOUT
This connector is provided to allow V
OUT
to be measured more accurately.
VINS —
Kelvin sensing for VIN
This connector is provided to allow V
IN
to be measured more accurately.
4
Schematic
The bill of materials from
is tabulated in
. In addition,
shows the corresponding
schematic.