High Density EVM Description
3
SNVU609B – October 2018 – Revised April 2020
Copyright © 2018–2020, Texas Instruments Incorporated
LM5180-Q1 Dual-Output EVM User's Guide
1
High Density EVM Description
The
EVM is designed to use a regulated or non-regulated high-voltage input rail
ranging from 10 V to 65 V to produce a tightly-regulated, isolated output voltages of 15 V and –7.7 V at
load currents up to 200 mA. This wide V
IN
range isolated DC/DC solution offers outsized voltage rating
and operating margin to withstand supply rail voltage transients.
The power-train passive components selected for this EVM, including flyback transformer, flyback
rectifying diodes, and ceramic input and output capacitors, are available from multiple component vendors.
Transformers with functional or basic grade isolation are available with isolation voltages of 1.5 kV and
greater.
1.1
Typical Applications
•
Automotive HEV/EV powertrain systems
•
Sub-AM band
•
: IGBT and
•
and
•
Building automation HVAC systems
•
Isolated bias power rails
1.2
Features and Electrical Performance
•
Tightly-regulated, isolated output voltages of 15 V and –7.7 V with better than ±2% load regulation
from 1% to 100% load
•
Wide input voltage operating range of 10 V to 65 V
•
Full load current of 200 mA, both outputs
•
Maximum switching frequency of 350 kHz remains below the AM band for automotive applications
•
High efficiency across wide load current range
–
Full load efficiency of 88% and 87.5% at V
IN
= 24 V and 48 V, respectively
–
88.5% efficiency at half-rated load, V
IN
= 24 V
•
1.4-mA and 1.1-mA no-load supply current at V
IN
= 24 V and 48 V, respectively
•
Ultra-low conducted and radiated EMI signatures
–
Optimized for CISPR 25 class 5 requirements
–
Soft switching avoids diode reverse recovery
–
Input
π
-stage EMI filter with damping from electrolytic capacitor ESR
•
Boundary conduction mode (BCM) control architecture provides fast line and load transient response
–
Peak current-mode control
–
Quasi-resonant switching for reduced power loss
–
Internal loop compensation
•
Integrated 100-V flyback power MOSFET
–
Provides large headroom for input voltage transients
•
Cycle-by-cycle overcurrent protection (OCP)
•
Monotonic prebias output voltage start-up
•
User-adjustable soft-start time set to 8 ms by 47-nF capacitor connected between SS/BIAS and GND
–
Option for external bias using transformer auxiliary winding connected to SS/BIAS
•
Resistor-programmable input voltage UVLO with customizable hysteresis for applications with wide
turn-on and turn-off voltage difference
–
Input UVLO set to turn on and off at V
IN
of 9 V and 7 V, respectively
•
Low transformer primary-to-secondary (interwinding) capacitance to accommodate high dv/dt
secondary-side common-mode swings
•
Fully assembled, tested, and proven PCB layout with 55-mm × 38-mm total footprint
