Texas Instruments LDC2114, User Manual, Page: 41 / 60

PU/PD for LDC inputs
Layout note: move to bottom side
0
R33
0
R35
+1.8V
GND
LPWRB
0
R34
0
R36
+1.8V
GND
OUT3/ADDR
Design note: Do not populate R34 or R36 for LDC2114
Copyright © 2016, Texas Instruments Incorporated
OUT0_3.3
OUT1_3.3
OUT2_3.3
OUT3/ADDR_3.3
INTB_3.3
LPWRB_3.3
GND
GND
+3.3V +3.3V
GND
GND
Layout note: Perforate PCB along this header
Bridge between LDC and MSP430
INTB_3.3
LPWRB_3.3
SDA_3.3
SCL_3.3
OUT0_3.3
OUT1_3.3
OUT2_3.3
OUT3/ADDR_3.3
Layout note: Route traces between L & R header columns on inner layers
GND2
SDA_3.3
SCL_3.3
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15
17
19
21 16
18
20
22
J4
TSW-111-07-G-D
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LDC2114 EVM REV A Schematics and Layout
41 SNOU144 – December 2016
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LDC2114 Evaluation Module for Inductive Touch Inductance to Digital Converter
5 LDC2114 EVM REV A Schematics and Layout
Figure 42. Bridge between LDC and MSP430
Figure 43. PU/PD for LDC inputs