Texas Instruments ISO1541D, User Manual, Page: 7 / 17

Note the t
LOOP
effect on the rising edge of the input waveforms on SDA1 and SCL1.
Figure 2-2. Typical Waveforms, Inputs on Side 1
Figure 2-3 illustrates SDA2 and SCL2 of U1 being treated as inputs and driven by an I
2
C transmitter connected
to J3B/J4B (for SDA2) and J5B/J6B (for SCL2). The output waveforms for SDA1 and SCL1 are captured on the
oscilloscope at J3A/J4A and J5A/J6A respectively. Note the low level of the SDA1 and SCL1 outputs offset from
the ground level. This is due to the high output low level on side 1 designed to prevent a latch-up state.
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SLLU166A – JUNE 2012 – REVISED SEPTEMBER 2022
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ISO154xEVM Low-Power Bidirectional I
2
C Isolators Evaluation Module 7
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