3.4 Reference
There are multiple methods of applying a reference voltage to the device. A straightforward approach is to apply
a voltage to test point TP10 (TP18) with U1 and R5 (R25) not populated. If a buffered voltage is desired, U1
can be populated with an operational amplifier in an appropriate SOIC-8 (D) package and pinout. If the reference
voltage is GND, R5 (R25) is populated with a 0-Ω resistor.
Reference voltage circuitry on the board provides numerous options for biasing the corresponding reference
pins. The EVM layout allows for many configurations to bias the reference pin, such as:
•
• Buffer configuration
• Inverting and noninverting gain configurations
• 1st-order filtering at the noninverting input and feedback path
•
RISO + dual feedback stability compensation scheme
3.5 Miscellaneous
C1, C2, C6, and C7 are the populated bypass capacitors for the device, U2 and U3.
Similarly, C3, C4, C8 and C9 are populated to provide supply bypassing for U1.
C19 and C29 can be used with an X2Y
®
capacitor.
EVM Components
INA-DUAL-2AMP-EVM
9
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