Texas Instruments GC5325, User Manual

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Hardware Setup
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the path between the PA output and GC5325 receive input signals. A typical configuration using two
Mini-Circuit amplifiers, two RF couplers and the GC5325 EVM is shown in Figure F in the GC5325SEK
Figures file on the provided CD.
NOTE: To avoid any significant performance degradation, TI strongly suggests the use of a RF
bandpass filter to reject undesirable products in the transmitted signal. The filter must have a
1-dB bandwidth of 100 MHz to accommodate the full DPD correction bandwidth and must be
used between the TX output and the PA input. Additionally, the filter must have minimum
amplitude (+/-0.5 dB) and group delay variation (
± 2 ns) over the pass band.
• The GC5325 EVM contains two dip switch modules. The default switch settings are as follows:
– SW5 – All switches must be set to the "Open" position.
– SW7 - All switches must be set to the "Closed" position.
Switches 1 and 2 of dip switch SW5 set the frequency of the PG_CLK_OUT signal on SMA J2 of the
GC5325EVM. Based on the VCXO, these switches must be in the correct positions to provide the
proper baseband clock frequency to the TSW3100.
VCXO CDCM7005 DIVIDE of SW1 SW2 J2 Output Frequency
Frequency VCXO CLK
737.28 MHz DIVIDE BY 2 OPEN OPEN 122.88 MHz
737.28 MHz DIVIDE BY 2 CLOSED OPEN 147.45 MHz
737.28 MHz DIVIDE BY 2 OPEN CLOSED 147.45 MHz
672 MHz DIVIDE BY 2 OPEN OPEN 112 MHz
672 MHz DIVIDE BY 2 CLOSED OPEN 134.4 MHz
672 MHz DIVIDE BY 2 OPEN CLOSED 134.4 MHz
672 MHz DIVIDE BY 3 OPEN OPEN 74.6 MHz
672 MHz DIVIDE BY 3 CLOSED OPEN 89.6 MHz
672 MHz DIVIDE BY 3 OPEN CLOSED 89.6 MHz
Switch 3 of SW5 is not used. Switch 4 allows the RF section of the board to be either controlled by the
DSP or the FTDI USB adapter board mounted on the bottom of the GC5325EVM. The FTDI USB
driver software has not been very reliable and this interface should not be used.
2.1 Power-Up Sequence
Toggle switch SW4 on the GC5325EVM is the main power ON/OFF switch for both boards as long as
SW1 on the TSW3100 is in the ON position. SW5 on the TSW3100 controls two onboard regulators that
provide power to the banana jacks for optional external power. These are not used with the GC5325SEK,
and SW5 should remain in the OFF position. With power applied, certain status LEDs illuminate. See
Appendix A of this document for LED descriptions.
After the cables are installed and power is provided to the system, LEDs D1-D4 will display the current
version of firmware that is loaded inside the FPGA, with LED D1 the LSB and LED D4 the MSB of a
four-bit binary word. Both TX Channel Loop Back LEDs are illuminated (D5 and D6) along with two
CDCM7005 status LEDs (D14 and D15) after power up.
6 GC5325 System Evaluation Kit SLWU063F – April 2009 – Revised April 2011
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