Texas Instruments eInfochips TMDXEVM6657L, Technical Reference Manual, Page: 49 / 91

Technical Reference Manual TMDXEVM6657L
SPRUHG7 - Revised August 2012
TMDXEVM6657LE
Page 49 / 90
Table 3.18: SW3, DSP Configuration Switch
SW3 Position Description Default Value Function
1 LENDIAN 1(ON)
OFF - Big Endian mode
ON - Little Endian mode
2-5 BOOTMODE 0000 DSP Boot Mode Selection Pins
6-8
BOOT
DEVICE
CONFIG
000
DSP Device Configuration
Settings
3.3.5 SW5, DSP Boot mode
SW5 is an 8 position DIP switch, which is used for DSP boot mode selection, device number and as a 2 position
User Switch after DSP Boot. A diagram of the SW5 switch (with factory default settings) is shown below:
8
9
7
10
6
11
5
12
4
13
3
14
2
15
1
16
Logic “1”
Switch OFF
Logic “0”
Switch ON
Figure 3.6: SW5 default settings
The following table describes the positions and corresponding function on SW5.
Table 3.19: SW4, DSP Boot Mode Selection Switch
SW5 Position Description Default Value Function
4 - 1 Boot Mode[3:0] 0001
Boot mode selection pins for DSP
Master I2C boot mode for I2C address 50h
Refer to
TMS320C6657 Datasheet for details of other
boot modes supported.
8
– 5 *
Device Number
[3:0]
0000
Device number selection for multiple DSPs and
position 7 and 8 as User Switch-1 and User Switch-2
respectively after DSP boot.
Note
: Please change Boot Mode[3:0] to “0010” for NAND boot mode of this EVM. “0010” is primarily a Master I2C
boot mode for I2C address 51h for DSP, which works as NAND boot mode in this EVM.
* - SW5 position 7 and 8 is also configured as User Switch-1 and User Switch-2 respectively (after DSP boot).
FPGA monitors status of the user switches and stores its value into internal FPGA registers. The DSP can read
user switches‟ value by accessing FPGA‟s internal registers.