Texas Instruments DS90UB95 Q1EVM Series, User Manual, Page: 11 / 64

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DS90UB95x-Q1EVM Board Configuration
11 SNLU223A – August 2017 – Revised May 2019
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DS90UB95x-Q1EVM Deserializer User's Guide
3.7 Control Interface
Table 7. VDDIO Interface Header - J16
Reference Signal Description
J16 VDDIO
Selects VDDIO bus voltage
Short pins 1-2: 3.3V IO (Default)
Short pins 2-3: 1.8V IO
Table 8. GPIO Interface Header - J22
Reference Signal Description
J22.1 GPIO0 General Purpose Input/Output 0
J22.3 GPIO1 General Purpose Input/Output 1
J22.5 GPIO2 General Purpose Input/Output 2
J22.7 GPIO3/INTB
General Purpose Input/Output 3 / Interrupt (Active Low).
Pulled up to VDDIO by 4.7k
Ω
J22.9 GPIO4 General Purpose Input/Output 4
J22.11 GPIO5 General Purpose Input/Output 5
J22.13 GPIO6 General Purpose Input/Output 6
J22.15 EN 25MHz Enable/Disable 25MHz Oscillator
Table 9. CMLOUT Output Signals
Reference Signal Description
TP16 CMLOUTP Test Pad for Channel Monitor Loop-through Driver
TP17 CMLOUTN Test Pad for Channel Monitor Loop-through Driver
(1)
Only set one ON.
(2)
This function is only available with 2-MP ADAS chipsets.
Table 10. FPD-Link III Mode Control- J15
(1)
Reference Mode Description
J15.1 1 CSI Mode (DS90UB953-Q1 compatible)
(2)
J15.2 2 RAW12 / LF (DS90UB933 compatible)
J15.3 3 RAW12 / HF (DS90UB933 compatible)
J15.4 4 RAW10 (DS90UB933 compatible)
Table 11. Device Mode Control - J11
Reference Signal Input = L Input = H Description
J11.1 BISTEN
For Normal operation
(Default)
Test Mode enable Test Mode
J11.2 RSVD Tied to GND (Default) N/A Reserved
J11.3 VDD_SEL
Internal 1.1V regulator from
1.8V supply (Default)
1.1V is supplied to VDD1V1
pins
VDD 1.1V Source Select
J11.4 PDB Device is powered down Device is enabled (Default) Power-down Mode