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HIGH
SIGNAL
RESISTOR
SIGNAL
LOW
4-LEVEL CONTROL
HIGH
RESISTOR
FLOAT
LOW
PIN HEADER CONNECTION
Setup
6
SNLU142A – May 2014 – Revised January 2016
Copyright © 2014–2016, Texas Instruments Incorporated
DS110DF111EVM Evaluation Board
5
Setup
This section describes the jumpers and connectors on the EVM, as well and how to properly connect, set
up and use the DS110DF111EVM.
The DS110DF111EVM – SMA evaluation kit can be used in three different modes.
1. Pin Control Mode – provides access to selected signal integrity settings.
2. SMBus Slave Mode – full access to signal integrity and control settings.
3. EEPROM Mode – full access to signal integrity and control settings. EEPROM mode is a convenient
method of programming one or more DS110DF111 devices on system power-up when a SMBus
master (micro-controller or similar) is unavailable in the design.
This EVM and documentation focus on Pin Control and SMBus Slave Mode to highlight the ease-of-use
and excellent low-jitter performance of the DS110DF111.
5.1
Pin Control Mode
In Pin Control Mode, the external control pins on the DS110DF111 are used to configure the signal
integrity and control settings of the device. In this mode only a subset of the VOD and de-emphasis
(DEMA/B) levels are available. Due to the limited number of control pins, a limited bandwidth 4-level input
scheme has been implemented across the control pin interface. This allows for improved DE and VOD
control with fewer physical pins.
The 4 levels are defined below:
Table 1. Four-Level Logic Settings
Level
Input Pin Setting
Low - 0
1 k
Ω
to GND
Resistor - R
20 k
Ω
to GND
Float - F
Open
High - 1
1 k
Ω
to V
DD
The EVM interfaces to this 4-level IO using the setup below. Only one shunt connection is required to
access any of the 4 levels. This methodology minimizes the risk of improper connections that could
damage the board or board power supply.
Figure 2. 4-Level IO Control on EVM