Texas Instruments DRA72 Series User Manual Download Page 20

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SPRUIB9 – December 2016

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DRA72x EVM CPU Board User's Guide

3.22 IO Expander List

Table 17. I/O Expander Map

Device

Slave Address

I2C I/F

Expander

IO

Netname

Description

EXP1

0b0010 000

(0x20)

I2C1

INT#

PCF8575_INT

Interrupt output to SoC

P0

TS_LCD_GPIO1

Press Button Switch 1

P1

TS_LCD_GPIO2

Press Button Switch 2

P2

TS_LCD_GPIO3

Press Button Switch 3

P3

TS_LCD_GPIO4

Press Button Switch 4

P4

USER_LED1

User LED 1

P5

USER_LED2

User LED 2

P6

USER_LED3

User LED 3

P7

USER_LED4

User LED 4

P10

EXP_ETH0_RSTn

RGMII0 Reset

P11

EXP_ETH1_RSTn

RGMII1 Reset

P12

USB1-VBUS_OCN

USB1 Over Current Indication

P13

USB2-VBUS_OCN

USB2 Over Current Indication

P14

PCI_SW_RESETn

PCI Interface SW Reset

P15

CON_LCD_PWR_DN

LCD Board Master power enable

P16

Open

P17

TMP102_ALERT

Temperature Sensor Alarm

EXP2

0b0010 001

(0x21)

I2C1

INT#

PCF8575_INT

Interrupt output to SoC

P0

SEL_GPMC_AD_VID_S0

MUX out control signal for GPMC Vs VOUT3B
vs VIN1A

P1

USB1_ID

USB1 ID PIN

P2

USB2_ID

USB2 ID PIN

P3

SEL_I2C3_CAN2

MUX out control signal for I2C3 Vs DCAN2

P4

SEL_ENET_MUX_S0

MUX out control signal for RGMII0 Vs VIN

P5

MMC_PWR_ON

Power on regulator to MMC card

P6

NOR_ALT_ADDRn

MUX out control signals for alternate location of
GPMC control signals

P7

SEL_GPMC_AD_VID_S2

MUX out control signal for GPMC vs VOUT3B
vs VIN1A

P10

NAND_BOOTn

NAND boot Chip select enable signal

P11

NOR_BOOTn

NOR boot Chip select enable signal

P12

MMC2_BOOT

MUX out control signal for GPMC Vs MMC2

P13

QSPI_SELn

Not used, as QSPI is enabled with resistor mux

P14

UART_SEL1_3

MUX out control signal for UART1 vs UART for
terminal access

P15

MCASP1_ENn

COM8 interface level shifter enable signal

P16

SEL_UART3_SPI2

MUX out control signal for UART3 Vs SPI2

P17

Open

Summary of Contents for DRA72 Series

Page 1: ...nd QSPI 24 9 SoC Pinmux for GPMC VIN1 VOUT3 25 10 Mux Diagram for GPMC VIN1 VOUT3 26 11 SoC Pinmux for GPMC EMMC 26 12 Mux Diagram for GPMC and EMMC 27 13 SoC Pinmux for VIN2A and EMU 27 14 Mux Diagra...

Page 2: ...Controls for Memory Booting Options 14 12 Board Controls for Signaling and Operational Modes 14 13 User LEDs 17 14 Power Monitor Mapping 18 15 I2C Device Address Chart 19 16 SoC GPIO Map 19 17 I O Ex...

Page 3: ...ile the infotainment application daughter board JAMR3 and LCD TS daughter board will complement the CPU board to deliver complete system to jump start your evaluation and application development 2 Ove...

Page 4: ...the obsolete versions Table 4 through Table 6 indicates valid production versions Table 1 EVM Wake Up Board and Kits Obsolete Wake Up Platforms Description Model Number J6Eco ES1 0 CPU Board Socketed...

Page 5: ...x TDA2Ex CPU Bd ES2 0 HS CPU Board Power Supply Limited Accessory Cables EVMDR72BH 02 00 00 10 1 LCD TS Daughter Board 10 1 inch 1920X1200 LCD 24 bit color with projective and capacitive touch screen...

Page 6: ...T Line OUT Line IN Microphone IN Supported interfaces and peripherals CAN interface 2 wire PHY on DCAN1 Two USB host receptacles USB3 0 micro USB USB2 0 mini USB PCIe 1 2 support with component change...

Page 7: ...MIPI JTAG Codec Audio User LEDs EVM Config Switches Pwr LED INA Pwr Measure DDR3L Memory PMIC CAN Mic Lin Lout HP QSPI Codec Ethernet Dual CSI2 CAM Interface Processor www ti com Overview 7 SPRUIB9 De...

Page 8: ...amera Serial MicroSD LCD Panel Test Interface Overview www ti com 8 SPRUIB9 December 2016 Submit Documentation Feedback Copyright 2016 Texas Instruments Incorporated DRA72x EVM CPU Board User s Guide...

Page 9: ...mber 2016 Submit Documentation Feedback Copyright 2016 Texas Instruments Incorporated DRA72x EVM CPU Board User s Guide 3 Hardware 3 1 Hardware Architecture Figure 4 shows the functional block diagram...

Page 10: ...x LDO4 USB x vdda33v_usb2 010 010 x vdda_rtc x SMPS4 x vdda_pcie0 x vdda_usb1 x vdda_usb2 x vdda_hdmi x vdda_pcie x vdda_csi x vdda_sata x vdda_usb3 x LDO3 x vdda_gmac_core x vdda_per x vdda_ddr x vd...

Page 11: ...provided in EVM kit SDI65 12 U P6 ND SDI65 12 U P6 CUI Inc Barrel Plug 2 1 mm I D 5 5 mm O D 9 5 mm SDI65 12 UD P6 ND SDI65 12 UD P6 CUI Inc Barrel Plug 2 1 mm I D 5 5 mm O D 9 5 mm External Power Su...

Page 12: ...DDR3 1333 The memory is configured with four devices of 4 Gbit each x8b devices ECC is also supported DDR3L device used Micron MT41K512M8RH 125 AA E 4 8bit at 4 Gbit ea or equivalent EEC device used...

Page 13: ...is supported as a non volatile memory option on the EVM It is supported on chip select CS0 and thus can also be used as a boot device To access the onboard mux must be enabled by setting SW5 p1 to ON...

Page 14: ...GPMC_nCS0 for NAND flash boot SW5 1 OFF U57 P10 NOR_BOOTn 1 Low Enable GPMC_nCS0 for NOR flash boot SW5 2 OFF U57 P11 MMC2_BOOT Low Enable MMC2 Interface for eMMC flash boot SW5 3 OFF U57 P12 UART_SE...

Page 15: ...e mode The EVM includes capabilities to set and read each connector ID pin This is supported using the IO expander EXP2 P1 for USB1 P2 for USB2 In addition DIP switch SW1 provides the ability to manua...

Page 16: ...rom Leopard Imaging This approach provides flexibility for customers to select from a variety of available modules while also supporting connections of custom solutions The attached module can be conf...

Page 17: ...vide features such as Bluetooth and Wi Fi The COM8Q interface requires a 3 6 V power supply thus a dedicated regulator is provided All signals on the COM8Q interface are required to 1 8 volts thus vol...

Page 18: ...input DDR 0x45 J6_VDD_MPU 10m CPU MPU power rail TPS65917 SMPS1 0x46 J6_VDD_GPU 10m CPU GPU DSP IVA TPS65917 SMPS2 0x47 J6_VDD_CORE 10m CPU CORE power rail TPS65917 SMPS3 0x48 J6_VDD_1V8 10m CPU 1v8...

Page 19: ...GPIO on expansion boards are not included in this list as they are dependent upon the application board used Table 16 SoC GPIO Map Feature Peripheral Device EVM Bd Net Function SoC GPIO Connectivity...

Page 20: ...rd Master power enable P16 Open P17 TMP102_ALERT Temperature Sensor Alarm EXP2 0b0010 001 0x21 I2C1 INT PCF8575_INT Interrupt output to SoC P0 SEL_GPMC_AD_VID_S0 MUX out control signal for GPMC Vs VOU...

Page 21: ...n to connect I2C3 to either PM bus 1 or 2 P4 HDMI_CT_HPD HDMI Hot Plug Detect P5 HDMI_LS_OE HDMI Level Shifter Enable P6 VIN2_S2 MUX out control signal for VIN2A vs expansion signals P7 Open P10 SEL_C...

Page 22: ...rmat EEPROM Field Byte Location Value Description ID HEADER 3 0 0xAA5533EE Fixed value at start of header ID ID BOARD_NAME 19 4 DRA72x TDA2Ex ascii Fixed value of J6ECOCPU or DRA72x TDA2Ex ID VERSION_...

Page 23: ...RU21 SW5 3 OFF NOR Memory ON EMMC Memory EXP3 P 12 11 00 Reserved 01 NOR Memory selected by SW5 2 10 EMMC Memory selected by SW5 3 11 NOR Memory selected default B RU88 RU94 RU33 EXP2 P 7 0 00 Reserve...

Page 24: ...LK D 3 0 CS 0 RTCLK Figure 7 SoC Pinmux for GPMC and QSPI Mux A Selects between NOR and QSPI memory support NOTE The mux is implemented using resistors This was due to the signal rate and routing rest...

Page 25: ...ti com Signal Multiplex Logic 25 SPRUIB9 December 2016 Submit Documentation Feedback Copyright 2016 Texas Instruments Incorporated DRA72x EVM CPU Board User s Guide Figure 9 SoC Pinmux for GPMC VIN1 V...

Page 26: ...Mux B Selects between NOR NAND memories FPD Linkl for video and expansion as shown in Figure 10 The selection is made using the IO expander 2 and bits P7 and P0 The defaults are set to enable GPMC to...

Page 27: ...C memory as shown in Figure 12 The selection is made using the IO expander 3 and bits P15 and P14 If booting from EMMC the DIP Switch SW5 position 3 is used to select interface by default Figure 12 Mu...

Page 28: ...ra and expansion as shown in Figure 14 The selection is made using the IO expander 3 and bits P6 and P2 The default mode is set to expansion Figure 14 Mux Diagram for VIN2A and EMU 4 5 VIN2A and RGMII...

Page 29: ...nd bits P12 and P11 with the default set to Gig Ethernet The MDIO mux setting shown in RED in Figure 16 is only used if RGMII0 port is not selected Otherwise the MDIO function is provided by other pin...

Page 30: ...s Guide Mux J Selects between Gig Ethernet and expansion as shown in Figure 18 The selection is made using the IO expander 2 and bit P4 defaulting to Gig Ethernet Figure 18 Mux Diagram for RGMII0 and...

Page 31: ...include Digital CAN Bus DCAN2 TX RX I2C Serial Bus I2C3 SCL SDA Figure 21 SoC Pinmux for DCAN2 Mux L Selects between the DCAN2 header and expansion interface as shown in Figure 22 The selection is mad...

Page 32: ...016 Submit Documentation Feedback Copyright 2016 Texas Instruments Incorporated DRA72x EVM CPU Board User s Guide 5 1 Option 1 Micro A Plug to Standard B Plug Use a USB3 0 micro A to standard B and US...

Page 33: ...2016 Submit Documentation Feedback Copyright 2016 Texas Instruments Incorporated DRA72x EVM CPU Board User s Guide 5 2 Option 2 Micro A Plug to Micro B Plug Use a USB3 0 micro A to micro B and USB3 0...

Page 34: ...5 3 Option 3 Standard A Plug to Micro B Plug Use a USB3 0 micro B to standard A Host PC connects to the EVM acting as a device as shown in Figure 25 Figure 25 Option 3 6 References DRA72x_TDA2Ex CPU E...

Page 35: ...are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasona...

Page 36: ...transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indic...

Page 37: ...ified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors current sens...

Page 38: ...REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE L...

Page 39: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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