– Place shunt at J23 to connect VDDA1P8 LDO (triple supply mode only)
– Place shunt at J20 to connect VDDA2P5 LDO
– Place shunt at P2 1.8-V, 2.5-V, or 3.3-V to VDDIO on J17 and place corresponding strap selection shunts
– Place shunt at J24 to connect VDD1P1 LDO
– Remove shunt at J21 header
–
Wide Vin: Connect 5V - 36V to power jack connector J16
3.1.3 External Power Supply Operation
• DP83561EVM External Power
– Remove shunt at J23 to disconnect VDDA1P8 LDO
– Remove shunt at J20 to disconnect VDDA2P5 LDO
– Remove shunt at P2 to disconnect VDDIO LDO
– Remove shunt at J24 to disconnect VDD1P1 LDO
– Remove shunt at J21 header
– Connect 1.1V to VDD1P1 on J17
– Connect 1.8V to VDDA1P8 on J15 (triple supply mode only)
– Connect 2.5V to VDDA2P5 on J17
– Connect 1.8-V, 2.5-V, or 3.3-V to VDDIO on J17 and place corresponding strap selection shunts
– Connect ground to GND on J17
3.1.4 USB Power Supply Option
DP838561EVM block powered by USB.
• Place shunt at J23 to connect VDDA1P8 LDO (triple supply mode only)
• Place shunt at J20 to connect VDDA2P5 LDO
• Place shunt at P2 in desired VDDIO level to connect VDDIO LDO and place corresponding strap selection
shunts
• Place shunt at J24 to connect VDD1P1 LDO
– Place shunt at J21 header
•
Connect micro-usb to J42
Note
Only populate J21 when powering over USB.
Figure 3-2. DP83561EVM USB Power Supply
3.2 Configuration Options
3.2.1 Bootstrap Options
Some DP83561-SP configurations can be done through bootstrap options. Options can be selected with jumpers
or resistor population. Refer to the device data sheet for additional information on bootstrap options. Refer to the
schematic and layout sections of this User’s Guide for resistor and jumper locations. By default, PHY address
must be set to 00 and all straps must be mode 0 except for MIRROR_EN.
Board Setup Details
12
DP83561EVM User’s Guide
SLVUC11 – APRIL 2021
Copyright © 2021 Texas Instruments Incorporated